Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
09/2001
09/20/2001US20010022397 Hybrid BGA and QFP chip package assembly and process for same
09/20/2001US20010022396 Fan-out semiconductor chip assembly
09/20/2001US20010022395 Cooling structure for multichip module
09/20/2001US20010022393 Semiconductor device including edge bond pads and methods
09/20/2001US20010022392 Tented plated through-holes and method for fabrication thereof
09/20/2001US20010022391 Substrate for semiconductor device and semiconductor device fabrication using the same
09/20/2001US20010022388 Method of fabricating the same
09/20/2001US20010022382 Method of and apparatus for sealing an hermetic lid to a semiconductor die
09/20/2001US20010022381 Semiconductor raised source-drain structure
09/20/2001US20010022370 Transducer module with an optical semiconductor, and method for producing a transducer module
09/20/2001US20010022369 Semiconductor integrated circuit device
09/20/2001US20010022360 Test structure in an integrated semiconductor
09/20/2001US20010022237 Ceramic sintered product contains a crystal phase of lanthanum titanate and a glass phase present on the grain boundaries; high coefficient of thermal expansion and a high dielectric constant
09/20/2001US20010022236 Substrate for power semiconductor modules with through-plating of solder and method for its production
09/20/2001US20010022219 Plate type heat pipe and its mounting structure
09/20/2001US20010022021 Method of producing chip-type electronic devices
09/20/2001DE10110151A1 Wiring board e.g. for mobile communications device or computer, has insulating pattern formed on substrate, intersecting wiring pattern to define electrode
09/20/2001DE10034262C1 Semiconducting device, especially for motor vehicle, has temperature regulation, and control unit causes integrated circuit to perform dummy working cycles if temperature below threshold
09/20/2001DE10021098C1 Production of conducting pathways on an integrated chip comprises applying a stacked dielectric layer, carrying out photolithography, etching, applying conducting material and removing, and applying an insulating layer
09/20/2001DE10011892A1 Montagesubstrat und Wärmesenke für Hochleistungsdiodenlaserbarren Mounting substrate and heat sink for high power diode laser bars
09/20/2001DE10008695A1 Vorrichtung zur Aufnahme von vorzugsweise elektronischen Komponenten An apparatus for receiving electronic components preferably
09/20/2001CA2400982A1 High performance cold plate for electronic cooling
09/20/2001CA2374008A1 Cooling device for electronic components
09/19/2001EP1134806A2 Stress reducing lead-frame for plastic encapsulation
09/19/2001EP1134805A2 Solder bump fabrication methods and structure including a titanium barrier layer
09/19/2001EP1134804A2 Thermally enhanced semiconductor carrier
09/19/2001EP1134801A2 Method of fabrication and testing of electronic circuit structures in a semiconducting substrate
09/19/2001EP1134800A2 Semiconductor device baking method
09/19/2001EP1134300A2 Fe-Ni alloy
09/19/2001EP1133904A1 Deposited thin build-up layer dimensions as a method of relieving stress in high density interconnect printed wiring board substrates
09/19/2001EP1133800A1 Electronic component and coating agent
09/19/2001EP1133796A1 Two-dimensional support for semiconductor chips, and a method for producing such a two-dimensional support
09/19/2001EP1133793A1 Heat sink including a heat dissipating fin and method for fixing the heat dissipating fin
09/19/2001EP1133791A1 Heat sink manufacturing device and manufacturing method
09/19/2001EP0839078B1 Method of manufacturing Si-Al alloys for electronic packaging
09/19/2001CN1314072A High density printed circuit substrate and method of fabrication
09/19/2001CN1314005A Semiconductor chip with surface coating
09/19/2001CN1313993A Electronic component, and electronic apparatus in which the electronic component is mounted and its manufacturing method
09/19/2001CN1313882A Paste composition, and protective film and semiconductor device both obtained with the same
09/19/2001CN1313871A Epoxy resin composition and process for producing silane-modified epoxy resin
09/19/2001CN1313655A Socket for electric component
09/19/2001CN1313639A Semiconductor device
09/19/2001CN1313638A Aluminium-copper alloy workpiece and manufacture thereof and radiator therewith
09/19/2001CN1313637A Chip package with high effective heat transferring structure
09/19/2001CN1313636A Improvement of binding faces of tube top
09/19/2001CN1313409A Method for forming electric conductive region by ion implanation
09/19/2001CN1313360A 环氧树脂组合物及半导体装置 Epoxy resin composition and a semiconductor device
09/19/2001CN1071495C Mounting laminates and chip package equipped therewith
09/19/2001CN1071494C 半导体器件 Semiconductor devices
09/19/2001CN1071493C Semiconductor apparatus
09/19/2001CN1071492C Leadframe structure
09/19/2001CN1071491C 半导体封装件 Semiconductor package
09/19/2001CN1071490C Method for forming tungsten plug
09/18/2001US6292927 Reduction of process antenna effects in integrated circuits
09/18/2001US6292582 Method and system for identifying defects in a semiconductor
09/18/2001US6292368 Electrical power component mounted by brazing on a support and corresponding mounting process
09/18/2001US6292367 Thermally efficient semiconductor chip
09/18/2001US6292366 Printed circuit board with embedded integrated circuit
09/18/2001US6292365 Electronic apparatus
09/18/2001US6292362 Self-contained flowable thermal interface material module
09/18/2001US6292265 Method and apparatus for monitoring a chemical mechanical planarization process applied to metal-based patterned objects
09/18/2001US6292139 Electronic part and a method of manufacturing the same
09/18/2001US6292086 Lateral high-Q inductor for semiconductor devices
09/18/2001US6292024 Integrated circuit with a serpentine conductor track for circuit selection
09/18/2001US6292009 Reduced terminal testing system
09/18/2001US6291907 Magnetically coupled signal isolator using a faraday shielded MR or GMR receiving element
09/18/2001US6291899 Method and apparatus for reducing BGA warpage caused by encapsulation
09/18/2001US6291898 Ball grid array package
09/18/2001US6291897 Carriers including projected contact structures for engaging bumped semiconductor devices
09/18/2001US6291896 Functionally symmetric integrated circuit die
09/18/2001US6291895 Method of fabricating semiconductor having through hole
09/18/2001US6291894 Method and apparatus for a semiconductor package for vertical surface mounting
09/18/2001US6291893 Power semiconductor device for “flip-chip” connections
09/18/2001US6291892 Semiconductor package that includes a shallow metal basin surrounded by an insulator frame
09/18/2001US6291891 Semiconductor device manufacturing method and semiconductor device
09/18/2001US6291890 Semiconductor device having a silicide structure
09/18/2001US6291889 High temperature resistant thin-film system
09/18/2001US6291887 Dual damascene arrangements for metal interconnection with low k dielectric constant materials and nitride middle etch stop layer
09/18/2001US6291886 Semiconductor device having wirings with reflection preventing film and method of manufacturing the same
09/18/2001US6291885 Thin metal barrier for electrical interconnections
09/18/2001US6291884 Chip-size semiconductor packages
09/18/2001US6291883 Static random-access memory device having a local interconnect structure
09/18/2001US6291881 Dual silicon chip package
09/18/2001US6291880 Semiconductor device including an integrally molded lead frame
09/18/2001US6291879 Integrated circuit chip with improved locations of overvoltage protection elements
09/18/2001US6291878 Package for multiple high power electrical components
09/18/2001US6291877 Flexible IC chip between flexible substrates
09/18/2001US6291871 Method of jointly forming stacked capacitors and antifuses, method of blowing antifuses, and antifuses and stacked capacitors constituting a part of integrated circuitry
09/18/2001US6291864 Gate structure having polysilicon layer with recessed side portions
09/18/2001US6291858 Multistack 3-dimensional high density semiconductor device and method for fabrication
09/18/2001US6291835 Semiconductor device
09/18/2001US6291833 Apparatus for mapping scratches in an oxide film
09/18/2001US6291776 Thermal deformation management for chip carriers
09/18/2001US6291775 Flip chip bonding land waving prevention pattern
09/18/2001US6291627 Epoxy resin rendered flame retardant by reaction with 9,10-dihydro-9-oxa-10-phosphaphenanthrene-10-oxide
09/18/2001US6291626 Phosphorus-containing dihydric phenol or naphthol-advanced epoxy resin or cured
09/18/2001US6291556 Semiconductor encapsulating epoxy resin composition and semiconductor device
09/18/2001US6291348 Method of forming Cu-Ca-O thin films on Cu surfaces in a chemical solution and semiconductor device thereby formed
09/18/2001US6291344 Integrated circuit with improved contact barrier
09/18/2001US6291333 Method of fabricating dual damascene structure