Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
11/2001
11/06/2001US6313650 Insert testing system
11/06/2001US6313598 Power semiconductor module and motor drive system
11/06/2001US6313541 Bone-pad with pad edge strengthening structure
11/06/2001US6313540 Electrode structure of semiconductor element
11/06/2001US6313538 Semiconductor device with partial passivation layer
11/06/2001US6313537 Semiconductor device having multi-layered pad and a manufacturing method thereof
11/06/2001US6313536 Semicoductor device having a multilayered interconnection structure
11/06/2001US6313535 Wiring layer of a semiconductor integrated circuit
11/06/2001US6313533 Function element, substrate for mounting function element thereon, and method of connecting them to each other
11/06/2001US6313532 Semiconductor device and method for manufacturing the same
11/06/2001US6313530 Converter socket terminal
11/06/2001US6313529 Bump bonding and sealing a semiconductor device with solder
11/06/2001US6313527 Dual-dies packaging structure and packaging method
11/06/2001US6313526 Semiconductor apparatus, Including thin film belt-like insulating tape
11/06/2001US6313525 Hollow package and method for fabricating the same and solid-state image apparatus provided therewith
11/06/2001US6313524 Chip module with a plurality of flat contact elements mountable on either an external printed circuit board or an external circuit board substrate
11/06/2001US6313523 IC die power connection using canted coil spring
11/06/2001US6313522 Semiconductor structure having stacked semiconductor devices
11/06/2001US6313521 Semiconductor device and method of manufacturing the same
11/06/2001US6313520 Resin-sealed power semiconductor device including substrate with all electronic components for control circuit mounted thereon
11/06/2001US6313519 Support for semiconductor bond wires
11/06/2001US6313518 Porous silicon oxycarbide integrated circuit insulator
11/06/2001US6313517 With connecting layer of homopolymerized benzocyclobutene
11/06/2001US6313512 Low source inductance compact FET topology for power amplifiers
11/06/2001US6313497 Semiconductor device and method for manufacturing the same
11/06/2001US6313480 Structure and method for evaluating an integrated electronic device
11/06/2001US6313413 Wire structure of substrate for layout detection
11/06/2001US6313411 Wafer level contact sheet and method of assembly
11/06/2001US6313402 Stress relief bend useful in an integrated circuit redistribution patch
11/06/2001US6313399 Cooling element for an unevenly distributed heat load
11/06/2001US6313046 Method of forming materials between conductive electrical components, and insulating materials
11/06/2001US6313037 Semiconductor device and method for manufacturing the same
11/06/2001US6313031 Method of fabricating a contract structure having a composite barrier layer between a platinum layer and a polysilicon plug
11/06/2001US6313030 Method of making a conductive layer covering a hole of decreasing diameter in an insulation layer in a semiconductor device
11/06/2001US6313029 Method for forming multi-layer interconnection of a semiconductor device
11/06/2001US6313027 Method for low thermal budget metal filling and planarization of contacts vias and trenches
11/06/2001US6313026 Microelectronic contacts and methods for producing same
11/06/2001US6313025 Process for manufacturing an integrated circuit including a dual-damascene structure and an integrated circuit
11/06/2001US6313024 Method for forming a semiconductor device
11/06/2001US6313018 Process for fabricating semiconductor device including antireflective etch stop layer
11/06/2001US6313009 Fabrication method of semiconductor memory device with impurity regions surrounding recess
11/06/2001US6312994 Semiconductor device and method for fabricating the same
11/06/2001US6312980 Programmable triangular shaped device having variable gain
11/06/2001US6312978 Method for leadless die interconnect without substrate cavity
11/06/2001US6312977 Method of attaching a leadframe to singulated semiconductor dice
11/06/2001US6312976 Method for manufacturing leadless semiconductor chip package
11/06/2001US6312975 Semiconductor package and method of manufacturing the same
11/06/2001US6312973 IC die power connection using canted coil spring
11/06/2001US6312972 Pre-bond encapsulation of area array terminated chip and wafer scale packages
11/06/2001US6312964 Circuit, structure and method of testing a semiconductor, such as an integrated circuit
11/06/2001US6312963 Methods for determining on-chip interconnect process parameters
11/06/2001US6312876 Method for placing identifying mark on semiconductor wafer
11/06/2001US6312833 Multilayered wiring layer
11/06/2001US6312830 Refractory hydride layer formed from a portion of the underbump metalization layer.
11/06/2001US6312829 Epoxy resin and resin-sealed type semiconductor apparatus
11/06/2001US6312793 Multiphase low dielectric constant material
11/06/2001US6312791 Multilayer ceramic substrate with anchored pad
11/06/2001US6312766 Article comprising fluorinated diamond-like carbon and method for fabricating article
11/06/2001US6312614 Method for production of interposer for mounting semiconductor element
11/06/2001US6312535 Silicon alloys for electronic packaging
11/06/2001US6312496 Having an average particle diameter 0.2 to 0.6 microns and containing less than 0.1% particles in terms of number-size distribution that are 2.5 times the average particle diameter; used for laminated ceramic capacitors.
11/06/2001US6311959 Method and apparatus for generating controlled mixture of organic vapor and inert gas
11/06/2001US6311888 Resin film and a method for connecting electronic parts by the use thereof
11/06/2001US6311769 Thermal interface materials using thermally conductive fiber and polymer matrix materials
11/06/2001US6311767 Computer fan assembly
11/06/2001US6311766 Heat sink assembly
11/06/2001US6311765 Heat sink assembly
11/01/2001WO2001082415A1 Lga package socket
11/01/2001WO2001082389A1 Encapsulated display device
11/01/2001WO2001082377A2 Circuit
11/01/2001WO2001082375A2 Improved pillar connections for semiconductor chips and method of manufacture
11/01/2001WO2001082373A1 Nickel-iron expansion contact for semiconductor die
11/01/2001WO2001082372A1 Polymer stud grid array having feedthroughs and method for producing a substrate for a polymer stud grid array of this type
11/01/2001WO2001082367A1 Integrated circuit and method of manufacture thereof
11/01/2001WO2001082361A2 Method of forming an integrated circuit package at a wafer level
11/01/2001WO2001082352A1 Reinforcement material for silicon wafer and method of manufacturing ic chip using the reinforcement material
11/01/2001WO2001082351A1 A method of forming a conductive coating on a semiconductor device
11/01/2001WO2001082335A2 Real-time evaluation of stress fields and properties in line features formed on substrates
11/01/2001WO2001081856A2 Technique for determining curvatures of embedded line features on substrates
11/01/2001WO2000026149A9 High performance embedded rf filters
11/01/2001US20010037160 Crosstalk cancellation circuit, interconnection module, interconnection method of automatic interconnection apparatus, and integrated circuit
11/01/2001US20010037003 Latent catalyst, thermosetting resin composition comprising the catalyst, epoxy resin molding material comprising the catalyst, and semiconductor device
11/01/2001US20010036756 Connector module for integrated circuit device, and integrated circuit device suitable for use with the same
11/01/2001US20010036754 Flattened multilayer dielectric film
11/01/2001US20010036750 Dual damascene anti-fuse with via before wire
11/01/2001US20010036749 Apparatus and methods for integrated circuit planarization
11/01/2001US20010036739 Interim oxidation of silsesquioxane dielectric for dual damascene process
11/01/2001US20010036738 Semiconductor device manufacturing method
11/01/2001US20010036729 Method of making a void-free aluminum film
11/01/2001US20010036728 Method of manufacturing semiconductor device
11/01/2001US20010036724 Conductive lines, coaxial lines, integrated circuitry, and methods of forming conductive lines, coaxial lines, and integrated circuitry
11/01/2001US20010036723 Method of forming insulated metal interconnections in integrated circuits
11/01/2001US20010036722 Apparatus and manufacturing method for semiconductor device adopting an interlayer contact structure
11/01/2001US20010036720 Semiconductor component and method for manufacturing it
11/01/2001US20010036718 Stereolithographically fabricated conductive elements, semiconductor device components and assemblies including such conductive elements, and methods
11/01/2001US20010036716 Wire bonding to copper
11/01/2001US20010036711 Semiconductor device and manufacturing method of the same
11/01/2001US20010036695 Chip scale package
11/01/2001US20010036687 Substrateless chip scale package and method of making same
11/01/2001US20010036686 Methods of forming an integrated circuit device