Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
11/2001
11/21/2001CN1322977A Heat radiator
11/21/2001CN1322863A Electroplating apparatus
11/21/2001CN1075339C Electromagnetic interference suppressing body with low electromagnetic penetrability and reflectivity, and its electronic device
11/21/2001CN1075244C Method for producing metal wire
11/20/2001US6320780 Reduced impact from coupling noise in diagonal bitline architectures
11/20/2001US6320757 Electronic package
11/20/2001US6320754 Apparatus for the reduction of interfacial stress caused by differential thermal expansion in an integrated circuit package
11/20/2001US6320753 Integrated circuit board combining external contact zones and an antenna, and process for manufacturing such a board
11/20/2001US6320748 Power heatsink for a circuit board
11/20/2001US6320747 Method for manufacturing electric modules, and the electric module
11/20/2001US6320739 Electronic part and manufacturing method therefor
11/20/2001US6320397 Molded plastic carrier for testing semiconductor dice
11/20/2001US6320396 Parasitic MIM structural spot analysis method for semiconductor device and parasitic MIM structure spot analysis method for silicon semiconductor device
11/20/2001US6320270 Semiconductor device and method of producing the same
11/20/2001US6320268 Power semiconductor module
11/20/2001US6320267 Bonding layer in a semiconductor device
11/20/2001US6320264 Interconnect wiring with sidewalls and inter-wiring insulation composed of fluorine
11/20/2001US6320263 Semiconductor metalization barrier and manufacturing method therefor
11/20/2001US6320262 Semiconductor device and manufacturing method thereof
11/20/2001US6320261 High aspect ratio metallization structures for shallow junction devices, and methods of forming the same
11/20/2001US6320259 Semiconductor device, and a manufacturing apparatus for a method of manufacturing the semiconductor device
11/20/2001US6320258 Semiconductor device having alternating electrically insulative coated leads
11/20/2001US6320257 Chip packaging technique
11/20/2001US6320255 Rerouted semiconductor device and method of fabrication
11/20/2001US6320254 Plug structure
11/20/2001US6320253 Semiconductor device comprising a socket and method for forming same
11/20/2001US6320252 Pc
11/20/2001US6320251 Stackable package for an integrated circuit
11/20/2001US6320250 Semiconductor package and process for manufacturing the same
11/20/2001US6320249 Multiple line grids incorporating therein circuit elements
11/20/2001US6320248 Lead frame and method of fabricating semiconductor device including the lead frame
11/20/2001US6320247 Unit type clip lead terminal, clip lead terminal connecting method, lead terminal connecting board, and method of producing board with lead terminals
11/20/2001US6320245 Radiation-hardened semiconductor device
11/20/2001US6320243 Defect removable semiconductor devices and manufacturing methods thereof
11/20/2001US6320242 Semiconductor device having trimmable fuses and position alignment marker formed of thin film
11/20/2001US6320241 Circuitry and method of forming the same
11/20/2001US6320240 Semiconductor device and method of manufacturing the same
11/20/2001US6320232 Integrated semiconductor circuit with protective structure for protection against electrostatic discharge
11/20/2001US6320231 Semiconductor device for protecting a semiconductor chip from damage due to electrostatic discharge
11/20/2001US6320229 Semiconductor device
11/20/2001US6320225 SOI CMOS body contact through gate, self-aligned to source- drain diffusions
11/20/2001US6320224 Method for producing a semiconductor integrated circuit including a thin film transistor and a capacitor
11/20/2001US6320201 Semiconductor reliability test chip
11/20/2001US6320200 Sub-nanoscale electronic devices and processes
11/20/2001US6320138 Wiring substrate; for use in reduction in resistance and the occurrence of deformations in thin film
11/20/2001US6320137 Flexible circuit with coverplate layer and overlapping protective layer
11/20/2001US6320135 Flexible wiring substrate and its manufacturing method
11/20/2001US6320128 Environmentally-sealed electronic assembly and method of making same
11/20/2001US6320126 Vertical ball grid array integrated circuit package
11/20/2001US6319859 Borderless vias with HSQ gap filled metal patterns having high etching resistance
11/20/2001US6319849 Semiconductor device and a process for forming a protective insulating layer thereof
11/20/2001US6319833 Forming a copper (cu) or cu alloy interconnection pattern comprising a dense array of spaced apart cu or cu alloy lines bordering open dielectric field on surface of wafer; spraying the wafer with a chemical agent to remove dielectric material
11/20/2001US6319830 Process of fabricating semiconductor device
11/20/2001US6319829 Enhanced interconnection to ceramic substrates
11/20/2001US6319828 Method for manufacturing a chip scale package having copper traces selectively plated with gold
11/20/2001US6319827 Integrated electronic micromodule and method for making same
11/20/2001US6319825 Metallization process of semiconductor device
11/20/2001US6319820 Fabrication method for dual damascene structure
11/20/2001US6319818 Pattern factor checkerboard for planarization
11/20/2001US6319817 Method of forming viahole
11/20/2001US6319814 Method of fabricating dual damascene
11/20/2001US6319806 Integrated circuit wiring and fabricating method thereof
11/20/2001US6319797 Process for manufacturing a semiconductor device
11/20/2001US6319792 Providing first and second chip regions on silicon wafer, wherein first resist pattern for semiconductor device is to be formed in first chip region, and second chip region includes a plurality of evaluation regions, determining data rate
11/20/2001US6319791 Semiconductor device manufacturing method and semiconductor device
11/20/2001US6319768 Method for fabricating capacitor in dram cell
11/20/2001US6319766 Method of tantalum nitride deposition by tantalum oxide densification
11/20/2001US6319758 Redundancy structure in self-aligned contact process
11/20/2001US6319757 Adhesion and/or encapsulation of silicon carbide-based semiconductor devices on ceramic substrates
11/20/2001US6319756 Heat sink for chip stacking applications
11/20/2001US6319755 Conductive strap attachment process that allows electrical connector between an integrated circuit die and leadframe
11/20/2001US6319753 Semiconductor device having lead terminals bent in J-shape
11/20/2001US6319752 Single-layer autorouter
11/20/2001US6319750 Layout method for thin and fine ball grid array package substrate with plating bus
11/20/2001US6319749 Lead frame, semiconductor package having the same and method for manufacturing the same
11/20/2001US6319740 Multilayer protective coating for integrated circuits and multichip modules and method of applying same
11/20/2001US6319728 Decreasing chemical resistance of copper on surface; deposit copper containing moisture upon substrate, plasma treat copper and monitor chemical resistance
11/20/2001US6319638 Semiconductor device manufacturing method of accurately performing alignment of patterning, mask for exposure
11/20/2001US6319619 Semiconductor sealing resin composition, semiconductor device sealed with the same, and process for preparing semiconductor device
11/20/2001US6319564 Multilayer element with coating a nonconductive organic heavy metal complex to a microporous surface, breaking up the complex and metallization the conductor tracks
11/20/2001US6319450 Encapsulated circuit using vented mold
11/20/2001US6319387 Copper alloy electroplating bath for microelectronic applications
11/20/2001US6319019 Selectively reinforced flexible tape carrier packages for liquid crystal display modules
11/20/2001US6318452 Clip for heat sink
11/20/2001US6318451 Heat sink for integrated circuit
11/20/2001US6318091 Cryopump system with modular electronics
11/20/2001US6317948 Embedded thin film passive components
11/15/2001WO2001087032A1 Electronic power module
11/15/2001WO2001087023A1 Multilayer circuit board and method of producing the same
11/15/2001WO2001086774A1 Passive electrostatic shielding structure for electrical circuitry and energy conditioning with outer partial-shielded energy pathways
11/15/2001WO2001086722A2 Semiconductor component
11/15/2001WO2001086721A2 A semiconductor device including an integrated circuit housed in an array package having signal terminals arranged about centrally located power supply terminals
11/15/2001WO2001086720A1 Contact connector for a semiconductor component
11/15/2001WO2001086719A1 Thin layer chip insulation for conductive polymer connection
11/15/2001WO2001086718A2 Semiconductor device with fuses and method of manufacturing same
11/15/2001WO2001086716A1 Semiconductor device mounting circuit board, method of producing the same, and method of producing mounting structure using the same
11/15/2001WO2001086706A1 Method for substrate noise distribution
11/15/2001WO2001086221A1 Microstructured heat exchanger and method for producing the same
11/15/2001WO2001085848A1 Polymer composition containing clean filler incorporated therein
11/15/2001WO2001085377A1 Production method of radiators