Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
02/2002
02/05/2002US6344271 Materials and products using nanostructured non-stoichiometric substances
02/05/2002US6344234 Method for forming reflowed solder ball with low melting point metal cap
02/05/2002US6344157 Polymeric resin, conductive filler, 8-hydroxyquinoline corrosion inhibitor
02/05/2002US6343940 Contact structure and assembly mechanism thereof
02/05/2002US6343647 Thermal joint and method of use
02/05/2002US6343643 Cabinet assisted heat sink
02/05/2002US6343478 Water/air dual cooling arrangement for a CPU
02/05/2002CA2240589C Semiconductor device with an improved lead-chip adhesion structure and lead frame to be used therefor
01/2002
01/31/2002WO2002009485A2 Flip chip package, circuit board thereof and packaging method thereof
01/31/2002WO2002009484A2 Electrical component assembly and method of fabrication
01/31/2002WO2002009237A1 Method and apparatus for protecting and strengthening electrical contact interfaces
01/31/2002WO2002009194A1 Method and system for bonding a semiconductor chip onto a carrier using micro-pins
01/31/2002WO2002009182A1 Method for distributed shielding and/or bypass for electronic device with three-dimensional interconnection
01/31/2002WO2002009180A1 Plastic package base, air cavity type package and their manufacturing methods
01/31/2002WO2002009179A1 Resin sealed semiconductor device with stress-reducing layer
01/31/2002WO2002009176A2 Method for applying adjusting marks on a semiconductor disk
01/31/2002WO2002009173A2 Method of forming copper interconnect capping layers with improved interface and adhesion
01/31/2002WO2002009168A1 Curved chip on rigid support to be mounted removable on an appliance
01/31/2002WO2002009153A2 Method of fabricating integrated circuits, providing improved so-called 'saw bow' conductive tracks
01/31/2002WO2002008660A2 Heat exchanger having silicon nitride substrate for mounting high power electronic components
01/31/2002WO2001070867A3 Flame retardant epoxy molding compositions
01/31/2002WO2001065604A3 Functional lid for rf power package
01/31/2002WO2001063670A3 Integrated circuit package with device specific data storage
01/31/2002WO2001033630A3 Methods and compositions for detection and treatment of breast cancer, based on breast cancer-associated polypeptides
01/31/2002US20020013931 Method for power routing and distribution in an integrated circuit with multiple interconnect layers
01/31/2002US20020013443 Polybenzoxazole and crosslinking agent
01/31/2002US20020013420 Polyepoxides; electronic packages
01/31/2002US20020013134 Integrated structure of inductances with shared values on a semiconductor substrate
01/31/2002US20020013071 Final testing of IC die in wafer form
01/31/2002US20020013070 Spring structure with self-aligned release material
01/31/2002US20020013068 Vapor deposition using diluent gas
01/31/2002US20020013062 Etching silicon oxide doped with fluorine with hydrogen fluoride; forming hollow structures in semiconductor
01/31/2002US20020013061 Thinning and dicing of semiconductor wafers using dry etch, and obtaining semiconductor chips with rounded bottom edges and corners
01/31/2002US20020013060 Semiconductor device and method of manufacturing the same
01/31/2002US20020013056 Method to calibrate the wafer transfer for oxide etcher (with clamp)
01/31/2002US20020013047 Semiconductor processing methods of forming contact openings, methods of forming electrical connections and interconnections, and integrated circuitry
01/31/2002US20020013046 Multilayer dielectric
01/31/2002US20020013045 Multilayer connector
01/31/2002US20020013044 HDP liner layer prior to HSQ/SOG deposition to reduce the amount of HSQ/SOG over the metal lead
01/31/2002US20020013043 Semiconductor integrated circuit device and manufacturing method of that
01/31/2002US20020013026 Semiconductor device and method for manufacturing the same
01/31/2002US20020013021 Composition for wiring, a wiring using the composition, manufacturing method thereof, a display using the wiring and a manufacturing method thereof
01/31/2002US20020013020 Thin film transistor array substrate for liquid crystal display and method of fabricating the same
01/31/2002US20020013017 Multilayer circuit component and method for manufacturing the same
01/31/2002US20020013015 Method of manufacturing a semiconductor device
01/31/2002US20020013014 Method and structure for manufacturing improved yield semiconductor packaged devices
01/31/2002US20020013010 Contactor having conductive particles in a hole as a contact electrode
01/31/2002US20020012876 Lithography structure
01/31/2002US20020012762 Double-side thermally conductive adhesive tape for plastic-packaged electronic components
01/31/2002US20020012603 A copper alloy for use in electric and electronic parts comprising: Nickel: 0.1 to 1.0 mass %, iron: 0.01 to 0.3 mass %, Phosphoru: 0. 03 to 0.2 mass %, zinc 0.01 to 1.5 mass %, silicon 0.01 mass % or less, magnesium 0.001 mass %
01/31/2002US20020012234 Semiconductor package
01/31/2002US20020012233 Bare chip carrier and method of checking the bare chip
01/31/2002US20020012062 Image pickup device and its cover plate
01/31/2002US20020011907 Multilayer ceramic device
01/31/2002US20020011864 Socket pin and socket for electrical testing of semiconductor packages
01/31/2002US20020011678 Method and system for providing a robust alignment mark at thin oxide layers
01/31/2002US20020011677 Semiconductor device and method of making the same
01/31/2002US20020011676 Semiconductor structure having stacked semiconductor devices
01/31/2002US20020011675 Semiconductor device and method of manufacturing the same
01/31/2002US20020011674 Integrated power circuits with distributed bonding and current flow
01/31/2002US20020011673 Process and structure for an interlock and high performance multilevel structures for chip interconnects and packaging technologies
01/31/2002US20020011671 Semiconductor device and method of manufacturing the same
01/31/2002US20020011670 Semiconductor device manufacturing method including forming step of SOI structure and semiconductor device having SOI structure
01/31/2002US20020011669 Semiconductor device
01/31/2002US20020011668 Electronic package with bonded structure and method of making
01/31/2002US20020011667 Semiconductor device and method for manufacturing same
01/31/2002US20020011666 Selectively coating bond pads
01/31/2002US20020011665 Spherical semiconductor device and method for fabricating the same
01/31/2002US20020011664 Semiconductor element, manufacturing method thereof and BGA-type semiconductor device
01/31/2002US20020011663 Face-up semiconductor chip assemblies
01/31/2002US20020011662 Packaging substrate and semiconductor device
01/31/2002US20020011661 Push-in type semiconductor device including heat spreader
01/31/2002US20020011660 Heat sink sheet and fabrication method therefor
01/31/2002US20020011659 Insulating thick film composition, ceramic electronic device using the same, and electronic apparatus
01/31/2002US20020011658 Surface-mounting type electronic circuit unit suitable for miniaturization
01/31/2002US20020011657 Semiconductor device, an interposer for the semiconductor device, and a method of manufacturing the same
01/31/2002US20020011656 Semiconductor device protective overcoat with enhanced adhesion to polymeric materials and method of fabrication
01/31/2002US20020011655 Chip-like electronic components, a method of manufacturing the same, a pseudo wafer therefor and a method of manufacturing thereof
01/31/2002US20020011654 Semiconductor device
01/31/2002US20020011653 High quality factor, integrated inductor and production method thereof
01/31/2002US20020011651 Semiconductor device and packaging method thereof
01/31/2002US20020011650 Semiconductor Device
01/31/2002US20020011645 Electronic fuse structure and method of manufacturing
01/31/2002US20020011616 Semiconductor device and method of manufacturing the same
01/31/2002US20020011606 Semiconductor integrated circuit and designing method thereof
01/31/2002US20020011596 Electronic circuit unit that is suitable for miniaturization and suitable for simple output adjustment
01/31/2002US20020011354 Multichip module
01/31/2002US20020011353 Isolated flip chip or BGA to minimize interconnect stress due to thermal mismatch
01/31/2002US20020011352 Electronic circuit unit that is suitable for miniaturization and excellent in high frequency characteristic
01/31/2002US20020011351 Printed-wiring substrate and method for fabricating the same
01/31/2002US20020011349 Circuit board and method of manufacturing a circuit board
01/31/2002US20020011327 Heat sink-type cooling device
01/31/2002US20020011326 Air rectification blades
01/31/2002DE10121901A1 Speichersystem und hierfür verwendbares Speichermodul Storage system and this usable storage module
01/31/2002DE10057647A1 Gehäusestruktur für CCD-Chip Housing structure for CCD chip
01/31/2002DE10044540C1 Forming conducting coatings on substrate through hole walls involves applying covering coating on one side, coating with electrically conducting material, removing covering coating
01/31/2002DE10035399A1 Subträger, elektronische Baugruppe und Verfahren zur Herstellung derselben Subcarriers, electronic module and method of producing same
01/31/2002DE10034826A1 Baugruppe mit einem strukturierten Tärgerelement und einem mit diesem wirkverbundenen Substrat Assembly with a structured Tärgerelement and operatively connected to said substrate
01/30/2002EP1176641A2 Front-and-back electrically conductive substrate and method for manufacturing same
01/30/2002EP1176640A2 Contact structure of an integrated power circuit