Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 23 - Details of semiconductor or other solid state devices
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
03/2002
03/20/2002EP1019960A4 Ball grid array semiconductor package and method for making the same
03/20/2002EP0868746B1 Laser fuse bank structure
03/20/2002CN2482739Y Radiating fin
03/20/2002CN1341279A 半导体器件 Semiconductor devices
03/20/2002CN1341278A Pad metallization over active circuitry
03/20/2002CN1340991A Wiring baseplate and its manufacture method
03/20/2002CN1340859A 芯片型半导体器件 A chip-type semiconductor device
03/20/2002CN1340858A 半导体器件 Semiconductor devices
03/20/2002CN1340857A Electronic device and method for manufacturing this device
03/20/2002CN1340856A RF module member including surface elastic wave element and its manufacture method
03/20/2002CN1340586A Resin composition for sealing semiconductor, semiconductor device, semiconductor chip and semiconductor mounting structural body
03/20/2002CN1081390C Refractory metal capped low resistivity metal conductor lines and vias
03/20/2002CN1081345C Electrode wire distributing method for liquid crystal displaying element
03/19/2002USRE37599 From perfluorobenzene or fluorinated benzene polymers and aromatic diols; use in coating microelectronic structures, such as integrated circuits; low dielectric constant, low moisture absorption, and high thermal stability.
03/19/2002US6359951 Method and apparatus for high speed signaling
03/19/2002US6359792 Compact microwave structure having reduced RF leakage
03/19/2002US6359790 Multichip module having a silicon carrier substrate
03/19/2002US6359536 High frequency multi-layer module with electronic component receiving aperture and conductive via
03/19/2002US6359343 Temperature stabilization in flip chip technology
03/19/2002US6359342 Flip-chip bumping structure with dedicated test pads on semiconductor chip and method of fabricating the same
03/19/2002US6359341 Ball grid array integrated circuit package structure
03/19/2002US6359338 Semiconductor apparatus with self-security function
03/19/2002US6359335 Method of manufacturing a plurality of semiconductor packages and the resulting semiconductor package structures
03/19/2002US6359334 Thermally conductive adhesive tape for semiconductor devices and method using the same
03/19/2002US6359333 Wafer-pair having deposited layer sealed chambers
03/19/2002US6359332 Printed-wiring substrate having lead pins
03/19/2002US6359331 High power switching module
03/19/2002US6359329 Embedded wiring structure and method for forming the same
03/19/2002US6359328 Methods for making interconnects and diffusion barriers in integrated circuits
03/19/2002US6359313 Electrostatic discharge protection transistor for a semiconductor chip
03/19/2002US6359307 Method for forming self-aligned contacts and interconnection lines using dual damascene techniques
03/19/2002US6359297 Semiconductor device with movement of positive ion prevented
03/19/2002US6359248 Method for marking packaged integrated circuits
03/19/2002US6359236 Mounting component with leads having polymeric strips
03/19/2002US6359235 Electrical device mounting wiring board and method of producing the same
03/19/2002US6359234 Package substrate for mounting semiconductor chip with low impedance and semiconductor device having the same
03/19/2002US6359221 Resin sealed semiconductor device, circuit member for use therein
03/19/2002US6359091 As dielectrics in semiconductors
03/19/2002US6358863 Metal oxides and poly(para-xylylenes) for use in semiconductor devices; less interference (cross talk) and better reliability; improved thermal properties
03/19/2002US6358862 Passivation integrity improvements
03/19/2002US6358860 Line width calibration standard manufacturing and certifying method
03/19/2002US6358848 Forming semiconductors of calcium copper alloy on copper
03/19/2002US6358847 Method for enabling conventional wire bonding to copper-based bond pad features
03/19/2002US6358840 Forming and filling a recess in interconnect with alloy to minimize electromigration
03/19/2002US6358839 Solution to black diamond film delamination problem
03/19/2002US6358838 Semiconductor device and process for producing the same
03/19/2002US6358837 Method of electrically connecting and isolating components with vertical elements extending between interconnect layers in an integrated circuit
03/19/2002US6358836 Wafer level package incorporating elastomeric pads in dummy plugs
03/19/2002US6358833 Method of fabricating a micromachined chip scale package
03/19/2002US6358831 Method for forming a top interconnection level and bonding pads on an integrated circuit chip
03/19/2002US6358830 Method for manufacturing semiconductor device having interlayer dielectric film layers with like etch speeds
03/19/2002US6358814 Method for manufacturing semiconductor devices having an epitaxial layer and wafer alignment marks
03/19/2002US6358804 Forming thin films by applying a solution of dielectric, heat-curing resin, evaporating the solvent and curing; where the solution contains gas generating additives or solvents that cause dedensification and lower dielectric constant
03/19/2002US6358802 Method for manufacturing semiconductor device having a gate electrode film containing nitrogen
03/19/2002US6358780 Semiconductor package assemblies with moisture vents and methods of making same
03/19/2002US6358778 Semiconductor package comprising lead frame with punched parts for terminals
03/19/2002US6358776 Method of fabricating an electronic component and apparatus used therefor
03/19/2002US6358775 Multi-die semiconductor encapsulation method
03/19/2002US6358774 Method of manufacturing a semiconductor device
03/19/2002US6358772 Semiconductor package having semiconductor element mounting structure of semiconductor package mounted on circuit board and method of assembling semiconductor package
03/19/2002US6358771 Low oxygen assembly of glass sealed packages
03/19/2002US6358762 Manufacture method for semiconductor inspection apparatus
03/19/2002US6358630 Soldering member for printed wiring boards
03/19/2002US6358629 Encapsulated and cured epoxy resin with fillers, catalysts and flame retarders
03/19/2002US6358439 For forming conductive surface patterns on, ceramic substrate packages for semiconductor chip devices
03/19/2002US6358351 Sheet for a thermal conductive substrate, a method for manufacturing the same, a thermal conductive substrate using the sheet and a method for manufacturing the same
03/19/2002US6357595 Tray for semiconductor integrated circuit device
03/19/2002US6357517 Cooling apparatus boiling and condensing refrigerant
03/19/2002US6357514 Heat sink including a heat dissipating fin and method for fixing the heat dissipating fin
03/19/2002US6357112 Method of making connection component
03/15/2002CA2357317A1 Substrate for electronic circuit and electronic module using said substrate
03/14/2002WO2002021889A1 Heatsink retainer
03/14/2002WO2002021596A2 Semiconductor chip with a protective covering and associated production method
03/14/2002WO2002021595A2 Integrated core microelectronic package
03/14/2002WO2002021594A2 Improved chip crack stop design for semiconductor chips
03/14/2002WO2002021593A2 Method of forming titanium nitride (tin) films using metal-organic chemical vapor deposition (mocvd)
03/14/2002WO2002021592A2 Method for producing an electroconductive layer on the wall of through holes in a substrate
03/14/2002WO2002021591A1 Method for producing electrically conductive layers on the wall of through holes in a substrate
03/14/2002WO2002021587A1 Semiconductor device and method of manufacturing the semiconductor device
03/14/2002WO2002021576A2 Organic nanoelectric conductors
03/14/2002WO2002021241A2 Circuit arrangement and a method for detecting an undesired attack on an integrated circuit
03/14/2002WO2002003421A3 Semiconductor chip package with embedded capacitors
03/14/2002WO2001078109A3 High rigidity, multi-layered, semiconductor package and method of making the same
03/14/2002WO2001015208A3 Process for fabricating electronic devices having a thermally conductive substrate
03/14/2002WO2000065126A9 Cvd tantalum nitride plug formation from tantalum halide precursors
03/14/2002US20020032279 Epoxy resin modified with a side chain having a reactive phosphorus-containing compound, e.g., 9,10-dihydro-9-oxa-10-phosphaphenanthrene-10-oxide
03/14/2002US20020031923 Chip socket assembly and chip file assembly for semiconductor chips
03/14/2002US20020031918 Method of manufacture of ceramic composite wiring structures for semiconductor devices
03/14/2002US20020031916 Semiconductor device and manufacturing method thereof
03/14/2002US20020031915 Method for forming a silicide layer
03/14/2002US20020031912 Method of manufacturing a copper wiring in a semiconductor device
03/14/2002US20020031911 Forming interlayer insulating film on a semiconductor substrate; forming a damascene pattern by patterning; cleaning, and forming a diffusion barrier layer on the structure, forming chemical enhancer treatment
03/14/2002US20020031907 Depositing titanium layer over a dielectric layer; depositing an aluminum layer on titanium layer; patterning and etching titanium and aluminum layers to form an interconnect signal line
03/14/2002US20020031904 Semiconductor device and method for manufacturing the same
03/14/2002US20020031902 Flip chip-in-leadframe package and process
03/14/2002US20020031901 Contact and via fabrication technologies
03/14/2002US20020031894 Tap connections for circuits with leakage suppression capability
03/14/2002US20020031892 Bipolar transistor stabilized with electrical insulating elements
03/14/2002US20020031873 Method and apparatus for implementing selected functionality on an integrated circuit device
03/14/2002US20020031869 Leadframe and method for manufacturing resin-molded semiconductor device
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