Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
05/2002
05/01/2002CN1347153A Semiconductor device and mehtod for mfg. same
05/01/2002CN1347152A Semiconductor device and method for mfg. same
05/01/2002CN1347151A Package structure of CCD pick-up chip
05/01/2002CN1347146A Semiconductor device with silicon structure on insulator, and method for mfg. same
05/01/2002CN1347143A Spiral contactor and mfg. method thereof, semiconductor detection apparatus using same and electronic element
05/01/2002CN1347142A Semiconductor device and testing method for mfg. same
05/01/2002CN1347141A Method for mounting heat radiator to cavity down plastic chip carrier
05/01/2002CN1347140A Application of heat radiator with support effect for circuit board with chip
05/01/2002CN1084050C Electronic component comprising thin-film structure with passive elements
05/01/2002CN1083851C 环氧树脂组合物 The epoxy resin composition
04/2002
04/30/2002US6381553 Methods and systems for determining a ball-grid array seating plane
04/30/2002US6381164 Low profile, high density memory system
04/30/2002US6381137 Semiconductor module
04/30/2002US6381136 Dual spring clip attachment mechanism for controlled pressure interface thermal solution on processor cartridges
04/30/2002US6380838 Semiconductor device with repair fuses and laser trimming method used therefor
04/30/2002US6380795 Semiconductor integrated circuit
04/30/2002US6380729 Testing integrated circuit dice
04/30/2002US6380635 Apparatus and methods for coupling conductive leads of semiconductor assemblies
04/30/2002US6380634 Conductor wires and semiconductor device using them
04/30/2002US6380633 Pattern layout structure in substrate
04/30/2002US6380632 Center bond flip-chip semiconductor device and method of making it
04/30/2002US6380631 Apparatus and methods of packaging and testing die
04/30/2002US6380629 Wafer level stack package and method of fabricating the same
04/30/2002US6380627 Low resistance barrier layer for isolating, adhering, and passivating copper metal in semiconductor fabrication
04/30/2002US6380626 Semiconductor device for attachment to a semiconductor substrate
04/30/2002US6380625 Semiconductor interconnect barrier and manufacturing method thereof
04/30/2002US6380623 Microcircuit assembly having dual-path grounding and negative self-bias
04/30/2002US6380622 Electric apparatus having a contact intermediary member and method for manufacturing the same
04/30/2002US6380621 Semiconductor device and manufacturing method thereof
04/30/2002US6380620 Tape ball grid array semiconductor
04/30/2002US6380618 Fabrication of integrated circuits on both sides of a semiconductor wafer
04/30/2002US6380615 Chip size stack package, memory module having the same, and method of fabricating the module
04/30/2002US6380613 Semiconductor device
04/30/2002US6380607 Semiconductor device and method for reducing parasitic capacitance between data lines
04/30/2002US6380595 Semiconductor device and manufacturing method therefor
04/30/2002US6380578 High-speed stacked capacitor in SOI structure
04/30/2002US6380567 Semiconductor device and fabrication method thereof
04/30/2002US6380557 Test chip for evaluating fillers of molding material with dams formed on a semiconductor substrate to define slits for capturing the fillers
04/30/2002US6380555 Bumped semiconductor component having test pads, and method and system for testing bumped semiconductor components
04/30/2002US6380554 Test structure for electrically measuring the degree of misalignment between successive layers of conductors
04/30/2002US6380553 Multilayer matrix-addressable logic device with a plurality of individually matrix-addressable and stacked thin films of an active material
04/30/2002US6380492 Contact film used for devices having ball grid array structure and device mounting structure
04/30/2002US6380106 Forming spaced conductive lines over a semiconductor structure; forming filler material over conductive lines and semiconductor structure; forming permeable dielectric layer; vaporizing filler material; depositing insulating layer
04/30/2002US6380098 Composition for a wiring, a wiring using the composition, manufacturing method thereof, a display using the wiring and a manufacturing method thereof
04/30/2002US6380087 CMP process utilizing dummy plugs in damascene process
04/30/2002US6380084 Method to form high performance copper damascene interconnects by de-coupling via and metal line filling
04/30/2002US6380083 Process for semiconductor device fabrication having copper interconnects
04/30/2002US6380079 Metal wiring in semiconductor device and method for fabricating the same
04/30/2002US6380076 Dielectric filling of electrical wiring planes
04/30/2002US6380071 Method of fabricating semiconductor device
04/30/2002US6380065 Interconnection structure and fabrication process therefor
04/30/2002US6380064 Semiconductor devices and process for producing the same
04/30/2002US6380062 Method of fabricating semiconductor package having metal peg leads and connected by trace lines
04/30/2002US6380061 Process for fabricating bump electrode
04/30/2002US6380059 Method of breaking electrically conductive traces on substrate into open-circuited state
04/30/2002US6380049 Semiconductor substrate and method of manufacturing semiconductor device
04/30/2002US6380048 Die paddle enhancement for exposed pad in semiconductor packaging
04/30/2002US6380028 Semiconductor device and a method of manufacturing thereof
04/30/2002US6380025 Method of encapsulating a photovoltaic module by an encapsulating material and the photovoltaic module
04/30/2002US6380023 Methods of forming contacts, methods of contacting lines, methods of operating integrated circuitry, and integrated circuits
04/30/2002US6380003 Damascene anti-fuse with slot via
04/30/2002US6380002 Method for fabricating a flexible substrate based ball grid array (BGA) package
04/30/2002US6380001 Flexible pin count package for semiconductor device
04/30/2002US6380000 Automatic recovery for die bonder wafer table wafermap operations
04/30/2002US6379999 Semiconductor device and method of manufacturing the same
04/30/2002US6379997 Semiconductor device and method of producing the same and semiconductor device unit and method of producing the same
04/30/2002US6379996 Package for semiconductor chip having thin recess portion and thick plane portion
04/30/2002US6379991 Encapsulation methods for semiconductive die packages
04/30/2002US6379988 Pre-release plastic packaging of MEMS and IMEMS devices
04/30/2002US6379982 Wafer on wafer packaging and method of fabrication for full-wafer burn-in and testing
04/30/2002US6379785 Glass-coated substrates for high frequency applications
04/30/2002US6379772 Avoiding polymer fill of alignment sites
04/30/2002US6379759 Bisphenol type epoxy compound and a non-bisphenol type epoxy compound, and a crosslinking agent of at least one aromatic or alicyclic amine; resistant to liquid crystals, heat resistance, flexibility
04/30/2002US6379745 Applying conductor pattern to substrate; heating
04/30/2002US6379159 Interposer for chip size package and method for manufacturing the same
04/30/2002US6378759 Method of application of conductive cap-layer in flip-chip, COB, and micro metal bonding
04/30/2002US6378758 Conductive leads with non-wettable surfaces
04/30/2002US6378321 Semiconductor-based optical refrigerator
04/25/2002WO2002034022A1 Module support for electrical/electronic components
04/25/2002WO2002034020A1 An integrated circuit carrier
04/25/2002WO2002034019A1 Method of manufacturing an integrated circuit carrier
04/25/2002WO2002034018A1 A multi-chip integrated circuit carrier
04/25/2002WO2002033751A2 Microelectronic substrate with integrated devices
04/25/2002WO2002033750A1 Solvent assisted burnishing of pre-underfilled solder-bumped wafers for flipchip bonding
04/25/2002WO2002033749A1 Method for protecting electronic or micromechanical components
04/25/2002WO2002033741A1 Method for forming insulation film and method for manufacturing semiconductor device
04/25/2002WO2002032665A1 A method of manufacturing a fabric article to include electronic circuitry and an electrically active textile article
04/25/2002WO2002032636A2 Method for making micromolds
04/25/2002WO2001093328A3 Lead frame laminate and method for manufacturing semiconductor parts
04/25/2002WO2001065344A3 Method and apparatus for providing power to a microprocessor with integrated thermal and EMI management
04/25/2002US20020049094 Striking plate for a golf club head
04/25/2002US20020049042 RF module
04/25/2002US20020048973 Contact structure and production method thereof and probe contact assembly using same
04/25/2002US20020048972 Semiconductor device and method for fabricating the same
04/25/2002US20020048969 Method of forming film, method of manufacturing semiconductor device, and film forming apparatus
04/25/2002US20020048968 Porous silicon oxycarbide integrated circuit insulator
04/25/2002US20020048954 Contact structure and production method thereof and probe contact assembly using same
04/25/2002US20020048952 Hard Mask for copper plasma etch
04/25/2002US20020048951 Method includes applying either a pre-flux or a cover sheet over the solder ball mounting pads that prevents the solder ball mounting pads being plated with gold.
04/25/2002US20020048949 Method of forming a metal wiring in a semiconductor device