| Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155) |
|---|
| 05/21/2002 | US6392143 Flexible package having very thin semiconductor chip, module and multi chip module (MCM) assembled by the package, and method for manufacturing the same |
| 05/21/2002 | US6392004 Electronics |
| 05/21/2002 | US6391932 Dielectric polyimide |
| 05/21/2002 | US6391812 Silicon nitride sintered body and method of producing the same |
| 05/21/2002 | US6391795 Low k dielectric composite layer for intergrated circuit structure which provides void-free low k dielectric material between metal lines while mitigating via poisoning |
| 05/21/2002 | US6391785 Method for bottomless deposition of barrier layers in integrated circuit metallization schemes |
| 05/21/2002 | US6391776 Method of depositing a copper seed layer which promotes improved feature surface coverage |
| 05/21/2002 | US6391775 Method of forming embedded copper interconnections and embedded copper interconnection structure |
| 05/21/2002 | US6391774 Fabrication process of semiconductor device |
| 05/21/2002 | US6391771 Integrated circuit interconnect lines having sidewall layers |
| 05/21/2002 | US6391770 Method of manufacturing semiconductor device |
| 05/21/2002 | US6391764 Method for fabricating semiconductor device |
| 05/21/2002 | US6391758 Method of forming solder areas over a lead frame |
| 05/21/2002 | US6391745 Method for forming overlay verniers for semiconductor devices |
| 05/21/2002 | US6391737 Method of simultaneously forming patterns on a die of an alignment mark and other dies |
| 05/21/2002 | US6391726 Method of fabricating integrated circuitry |
| 05/21/2002 | US6391685 Method of forming through-holes in a wafer and then dicing to form stacked semiconductor devices |
| 05/21/2002 | US6391684 Lead frame and manufacturing method thereof |
| 05/21/2002 | US6391683 Flip-chip semiconductor package structure and process for fabricating the same |
| 05/21/2002 | US6391681 Semiconductor component having selected terminal contacts with multiple electrical paths |
| 05/21/2002 | US6391680 LOC semiconductor assembled with room temperature adhesive |
| 05/21/2002 | US6391678 Method for controlling solderability of a conductor and conductor formed thereby |
| 05/21/2002 | US6391673 Method of fabricating micro electro mechanical system structure which can be vacuum-packed at wafer level |
| 05/21/2002 | US6391669 Embedded structures to provide electrical testing for via to via and interface layer alignment as well as for conductive interface electrical integrity in multilayer devices |
| 05/21/2002 | US6391666 Circuit and periphey zones; marking periphey zone to locate defect in package |
| 05/21/2002 | US6391442 Elastomer; wax or waxlike melting point modifier; thermally conductive filler; heat transfer agent; microprocessor power assembly; heat sink |
| 05/21/2002 | US6391422 Wiring substrate and stiffener therefor |
| 05/21/2002 | US6391163 Method of enhancing hardness of sputter deposited copper films |
| 05/21/2002 | US6391082 Composites of powdered fillers and polymer matrix |
| 05/21/2002 | US6390854 Resin shield circuit device |
| 05/21/2002 | US6390853 Laser wire bonding for wire embedded dielectrics to integrated circuits |
| 05/21/2002 | US6390475 Electro-mechanical heat sink gasket for shock and vibration protection and EMI suppression on an exposed die |
| 05/21/2002 | US6390356 Method of forming cylindrical bumps on a substrate for integrated circuits |
| 05/21/2002 | US6390353 Multilayer; visible seal; electronic packages |
| 05/21/2002 | US6390188 CPU heat exchanger |
| 05/21/2002 | US6390182 Heat sink assembly |
| 05/21/2002 | US6390181 Densely finned tungsten carbide and polycrystalline diamond cooling module |
| 05/21/2002 | US6389817 Internal temperature control for a microdrive |
| 05/21/2002 | US6389691 Methods for forming integrated redistribution routing conductors and solder bumps |
| 05/21/2002 | US6389690 Method of coating printed circuit board |
| 05/21/2002 | US6389689 Method of fabricating semiconductor package |
| 05/21/2002 | US6389687 Method of fabricating image sensor packages in an array |
| 05/16/2002 | WO2002039797A1 A dielectric spacing layer |
| 05/16/2002 | WO2002039498A2 Methods and systems for positioning substrates |
| 05/16/2002 | WO2002039497A1 Integrated circuit inductor structure and non-destructive etch depth measurement |
| 05/16/2002 | WO2002039487A2 Device and method for encasing an electronic component |
| 05/16/2002 | WO2002039483A2 Single metal programmability in a customizable integrated circuit device |
| 05/16/2002 | WO2002039463A2 Methods and system for attaching substrates using solder structures |
| 05/16/2002 | WO2002039241A2 Electrical component |
| 05/16/2002 | WO2002039131A2 Method for locating defects and measuring resistance in a test structure |
| 05/16/2002 | WO2002021594A3 Improved chip crack stop design for semiconductor chips |
| 05/16/2002 | WO2002005298A3 Semiconductor inductor and methods for making the same |
| 05/16/2002 | WO2001082361A3 Method of forming an integrated circuit package at a wafer level |
| 05/16/2002 | US20020058778 Used as an underfilling sealant between such a semiconductor device and a circuit board to which the semiconductor device is electrically connected |
| 05/16/2002 | US20020058756 Underfill sealants with improved adhesion, improved resistance to moisture absorption and improved resistance to stress cracking |
| 05/16/2002 | US20020058743 Thermally conductive polymer composition and thermally conductive molded article |
| 05/16/2002 | US20020058742 As underfill for flip-chip type semiconductor devices for optical communications |
| 05/16/2002 | US20020058417 A) removing an oxide from a surface; and b) commencing application of a passivation layer to the surface within 5 seconds of the oxide removal. |
| 05/16/2002 | US20020058411 Semiconductor device having low dielectric layer and method of manufacturing thereof |
| 05/16/2002 | US20020058407 Structure of critical dimension bar |
| 05/16/2002 | US20020058405 A structure to reduce line-line capacitance with low k material |
| 05/16/2002 | US20020058403 Method of forming overmolded chip scale package and resulting product |
| 05/16/2002 | US20020058401 Metal line deterioration due to electromigration is minimized to improve its reliability. |
| 05/16/2002 | US20020058396 Use of a reference fiducial on a semiconductor package to monitor and control a singulation method |
| 05/16/2002 | US20020058395 High density flip chip memory arrays |
| 05/16/2002 | US20020058390 Semiconductor device and method for fabricating the same |
| 05/16/2002 | US20020058384 Laminated structure and a method of forming the same |
| 05/16/2002 | US20020058368 Electrostatic discharge (ESD); dummy gate electrode and a first impurity layer are defined by patterning the sacrificial layer |
| 05/16/2002 | US20020058360 Method of encapsulating semiconductor devices utilizing a dispensing apparatus with rotating orifices |
| 05/16/2002 | US20020058359 Method of attaching a semiconductor chip to a leadframe with a footprint of about the same size as the chip and packages formed thereby |
| 05/16/2002 | US20020058358 Method and structure for manufacturing improved yield semiconductor packaged devices |
| 05/16/2002 | US20020058356 Semiconductor package and mount board, and mounting method using the same |
| 05/16/2002 | US20020058354 Layout method for thin and fine ball grid array package substrate with palting bus |
| 05/16/2002 | US20020058347 Semiconductor package with a controlled impedance bus and method of forming same |
| 05/16/2002 | US20020058346 TFI probe I/O wrap test method |
| 05/16/2002 | US20020058163 Graded composition diffusion barriers for chip wiring applications |
| 05/16/2002 | US20020058151 Surface electrode structure on ceramic multi-layer substrate and process for producing the same |
| 05/16/2002 | US20020058150 Method for processing a semiconductor substrate having a copper surface disposed thereon and structure formed |
| 05/16/2002 | US20020058145 Light-transmissive epoxy resin composition and semiconductor device |
| 05/16/2002 | US20020058142 Low dielectric constant material having thermal resistance, insulation film between semiconductor layers using the same, and semiconductor device |
| 05/16/2002 | US20020058137 Dielectric spacing layer |
| 05/16/2002 | US20020058131 Reducing warpage by use of low temperature sinterable ceramic and an inorganic particle which constrains the shrinkage and which is not sintered at a sintering temperature |
| 05/16/2002 | US20020057884 Heater module and optical waveguide module |
| 05/16/2002 | US20020057610 Vertical power devices having insulated source electrodes in discontinuous deep trenches |
| 05/16/2002 | US20020057560 Shielding case and electronic device having the same |
| 05/16/2002 | US20020057558 Perimeter matrix ball grid array circuit package with a populated center |
| 05/16/2002 | US20020057555 Electronic unit |
| 05/16/2002 | US20020057554 Method and apparatus for thermal and mechanical management of a power regulator module and microprocessor in contact with a thermally conducting plate |
| 05/16/2002 | US20020057553 Stacked intelligent power module package |
| 05/16/2002 | US20020057394 Liquid crystal display units |
| 05/16/2002 | US20020057176 Integrated circuit inductor structure and non-destructive etch depth measurement |
| 05/16/2002 | US20020057129 Semiconductor integrated circuit |
| 05/16/2002 | US20020056927 Method of making semiconductor device having first and second sealing resins |
| 05/16/2002 | US20020056926 Low-pin-count chip package and manufacturing method thereof |
| 05/16/2002 | US20020056924 Semiconductor package having an insulating region on an edge of a chip to prevent shorts |
| 05/16/2002 | US20020056923 Semiconductor device with a radiation absorbing conductive protection layer and method of fabricating the same |
| 05/16/2002 | US20020056922 Semiconductor device, production method thereof, and coil spring cutting jig and coil spring guiding jig applied thereto |
| 05/16/2002 | US20020056921 Semiconductor device having improved contact hole structure, and method of manufacturing the same |
| 05/16/2002 | US20020056920 High- frequency semiconductor device and method of manufacturing the same |
| 05/16/2002 | US20020056919 Semiconductor device with reduced number of intermediate interconnection pattern and method of forming the same |