| Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155) |
|---|
| 05/07/2002 | US6384484 Semiconductor device |
| 05/07/2002 | US6384483 Having a silicon polyimide resin interlayer as a dielectric covered with oxide silicon films, that allow moisture to permeate while suppressing the permeation of reaction products |
| 05/07/2002 | US6384481 Single step electroplating process for interconnect via fill and metal line patterning |
| 05/07/2002 | US6384479 Semiconductor integrated circuit device |
| 05/07/2002 | US6384478 Leadframe having a paddle with an isolated area |
| 05/07/2002 | US6384477 Multiple line grid array package |
| 05/07/2002 | US6384476 Semiconductor integrated circuit and printed wiring substrate provided with the same |
| 05/07/2002 | US6384475 Lead formation using grids |
| 05/07/2002 | US6384474 Housing for receiving a planar power transistor |
| 05/07/2002 | US6384473 Microelectronic device package with an integral window |
| 05/07/2002 | US6384472 Leadless image sensor package structure and method for making the same |
| 05/07/2002 | US6384471 Pbga package with integrated ball grid |
| 05/07/2002 | US6384470 Contact terminal element, contact terminal device |
| 05/07/2002 | US6384468 Capacitor and method for forming same |
| 05/07/2002 | US6384467 Method for forming a cavity capable of accessing deep fuse structures and device containing the same |
| 05/07/2002 | US6384464 Integrated circuit device including dummy patterns surrounding pads |
| 05/07/2002 | US6384463 High voltage shield |
| 05/07/2002 | US6384440 Ferroelectric memory including ferroelectric capacitor, one of whose electrodes is connected to metal silicide film |
| 05/07/2002 | US6384426 System for testing semiconductor chip leads constrained in dielectric media |
| 05/07/2002 | US6384385 Process and device for the thermal conditioning of electronic components |
| 05/07/2002 | US6384377 Aging socket, aging cassette and aging apparatus |
| 05/07/2002 | US6384347 Glass-ceramic wiring board |
| 05/07/2002 | US6384344 Circuit board for mounting electronic parts |
| 05/07/2002 | US6384343 Semiconductor device |
| 05/07/2002 | US6384342 Heat-resistant electronic systems and circuit boards with heat resistant reinforcement dispersed in liquid metal |
| 05/07/2002 | US6384333 Underfill coating for LOC package |
| 05/07/2002 | US6384332 Bladder insert for encapsulant displacement |
| 05/07/2002 | US6384331 Secured reinforcing support device for a heat sink |
| 05/07/2002 | US6384312 Thermoelectric coolers with enhanced structured interfaces |
| 05/07/2002 | US6383955 Silicone polymer insulation film on semiconductor substrate and method for forming the film |
| 05/07/2002 | US6383951 Reacting and depositing methylsilane with hydrogen peroxide to form silicic acid and methylsilanetriol, plasma polymerizing to form polysiloxane and polysilicate, and annealing |
| 05/07/2002 | US6383945 High selectivity pad etch for thick topside stacks |
| 05/07/2002 | US6383930 Method to eliminate copper CMP residue of an alignment mark for damascene processes |
| 05/07/2002 | US6383929 Forming interconnects over silk? polymer interlayer by depositing titanium, titanium nitride, and tantalum or tantalum nitride; nonalloying with copper; eliminates open circuits after heat treatment |
| 05/07/2002 | US6383925 Treating copper or copper alloy interconnects with nitrogen and ammonia, depositing a silane, reducing the silane to silicon nitride with high density plasma; improved adhesion of nitride layer to copper |
| 05/07/2002 | US6383924 Method of forming buried conductor patterns by surface transformation of empty spaces in solid state materials |
| 05/07/2002 | US6383923 Article comprising vertically nano-interconnected circuit devices and method for making the same |
| 05/07/2002 | US6383922 Depositing cobalt on silicon, annealing and siliciding, depositing titanium and annealing again to form thermally stable cobalt disilicide; used in fabrication of integrated circuits |
| 05/07/2002 | US6383920 Process of enclosing via for improved reliability in dual damascene interconnects |
| 05/07/2002 | US6383917 Method for making integrated circuits |
| 05/07/2002 | US6383916 Top layers of metal for high performance IC's |
| 05/07/2002 | US6383915 Depositing titanium and titanium nitride using high density plasma, then depositing aluminum over the surface with a <111> rockwell curve fwhm angle of one degree or less; reduced pitting |
| 05/07/2002 | US6383914 Method of manufacturing an aluminum interconnect structure of a semiconductor device having <111> orientation |
| 05/07/2002 | US6383911 Trench interconnect formed in polyimide film using chemical vapor deposition and sputtering techniques; increased interlayer connection resistance |
| 05/07/2002 | US6383910 Method of manufacturing a semiconductor device, and a semiconductor device manufactured thereby |
| 05/07/2002 | US6383909 Forming aluminum oxide on aluminum or aluminum alloy wiring by baking with water; improves bonding of wires to aluminum wiring |
| 05/07/2002 | US6383907 Process for fabricating a semiconductor device |
| 05/07/2002 | US6383894 Method of forming scribe line planarization layer |
| 05/07/2002 | US6383893 Method of forming a crack stop structure and diffusion barrier in integrated circuits |
| 05/07/2002 | US6383869 Side wall contact structure and method of forming the same |
| 05/07/2002 | US6383858 Interdigitated capacitor structure for use in an integrated circuit |
| 05/07/2002 | US6383846 Method and apparatus for molding a flip chip semiconductor device |
| 05/07/2002 | US6383845 Stacked semiconductor device including improved lead frame arrangement |
| 05/07/2002 | US6383842 Method for producing semiconductor device having increased adhesion between package and semiconductor chip bottom |
| 05/07/2002 | US6383840 Semiconductor device, method of manufacture thereof, circuit board, and electronic device |
| 05/07/2002 | US6383838 Substrateless chip scale package and method of making same |
| 05/07/2002 | US6383837 Method of manufacturing a multi-chip semiconductor device effective to improve alignment |
| 05/07/2002 | US6383835 IC package having a conductive material at least partially filling a recess |
| 05/07/2002 | US6383827 Electrical alignment test structure using local interconnect ladder resistor |
| 05/07/2002 | US6383824 Method of using scatterometry measurements to control deposition processes |
| 05/07/2002 | US6383821 Semiconductor device and process |
| 05/07/2002 | US6383660 Epoxy resin, phenolic resin, curing accelerator, and hollow inorganic filler of given particle size and shell thickness; low-dielectric constant epoxy resin |
| 05/07/2002 | US6383659 Autopolymerizable epoxy resin or curable phenolic resin; semiconductor packaging; filler, curing catalyst, and thermoplastic resin |
| 05/07/2002 | US6383302 Apparatus and method for manufacturing semiconductor device |
| 05/07/2002 | US6383292 Semiconductor device encapsulators |
| 05/07/2002 | US6383002 Heat sink for an electrical part assembly |
| 05/07/2002 | US6382307 Device for forming heat dissipating fin set |
| 05/07/2002 | US6382306 Geometrical streamline flow guiding and heat-dissipating structure |
| 05/07/2002 | US6381845 Method of manufacturing plate type heat pipe |
| 05/07/2002 | US6381838 BGA package and method of manufacturing the same |
| 05/07/2002 | US6381836 Clip and pin field for IC packaging |
| 05/07/2002 | US6381813 Device for retaining cooling piece |
| 05/02/2002 | WO2002035897A1 Use of metallic treatment on copper foil to produce fine lines and replace oxide process in printed circuit board production |
| 05/02/2002 | WO2002035896A1 Integrated circuit carrier with recesses |
| 05/02/2002 | WO2002035666A1 Cooler, semiconductor laser light source, semiconductor laser light source unit, method for producing semiconductor laser light source unit, and solid laser |
| 05/02/2002 | WO2002035607A2 Semiconductor assembly and method for producing semiconductor assemblies of this type |
| 05/02/2002 | WO2002035602A1 Bump forming method and bump forming device |
| 05/02/2002 | WO2002035289A2 Method and materials for printing particle-enhanced electrical contacts |
| 05/02/2002 | WO2002034850A1 Varnish containing polyamide resin and use thereof |
| 05/02/2002 | WO2002017399A8 Semiconductor arrangement and method for production thereof |
| 05/02/2002 | WO2002016851A3 A cooling system |
| 05/02/2002 | WO2002006645A3 Reconfigurable system and method for cooling heat generating objects |
| 05/02/2002 | WO2001099194A3 Semiconductor arrangement |
| 05/02/2002 | WO2001039255A3 Radiation shield and radiation shielded integrated circuit device |
| 05/02/2002 | WO2000045420A9 Multiple chip module with integrated rf capabilities |
| 05/02/2002 | US20020053055 Semiconductor device having a test mode |
| 05/02/2002 | US20020052109 Method and system for forming copper thin film |
| 05/02/2002 | US20020052108 Semiconductor device fabrication method |
| 05/02/2002 | US20020052106 Method for fabricating semiconductor device |
| 05/02/2002 | US20020052105 Chip package with grease heat sink and method of making |
| 05/02/2002 | US20020052104 Semiconductor chip installing tape, semiconductor device and a method for fabricating thereof |
| 05/02/2002 | US20020052091 Automated combi deposition apparatus and method |
| 05/02/2002 | US20020052065 Conductor posts, construction for and method of fabricating semiconductor integrated circuit chips using the conductor post, and method of probing semiconductor integrated circuit chips |
| 05/02/2002 | US20020052063 Method and apparatus for packaging a microelectronic die |
| 05/02/2002 | US20020052062 Layers of a conductive pattern isolated by a trench are formed on a conductive foil to form a multilayered wiring structure, a circuit is mounted and molded with an insulating resin and the back surface of the conductive foil is etched |
| 05/02/2002 | US20020052056 Semiconductor device and method for fabricating the same |
| 05/02/2002 | US20020052054 Multi-chip module system and method of fabrication |
| 05/02/2002 | US20020051914 Forming alignment marks after ion implantation to serve as aligning markers for subsequent processes |
| 05/02/2002 | US20020051883 Processing and manufacturing methods enabled using non-stoichiometric nanomaterials |
| 05/02/2002 | US20020051610 Sealed airtight container for optical-semiconductors and optical-semiconductors module |