Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155) |
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06/11/2002 | US6404048 Heat dissipating microelectronic package |
06/11/2002 | US6404046 Module of stacked integrated circuit packages including an interposer |
06/11/2002 | US6404045 IGBT and free-wheeling diode combination |
06/11/2002 | US6404041 EMC-optimized power switch |
06/11/2002 | US6404040 Semiconductor device with metal peripheral area |
06/11/2002 | US6404035 Laser fuse structure |
06/11/2002 | US6404030 Chain gate MOS structure |
06/11/2002 | US6404026 Semiconductor devices |
06/11/2002 | US6404021 Laminated structure and a method of forming the same |
06/11/2002 | US6404016 Semiconductor device |
06/11/2002 | US6403979 Test structure for measuring effective channel length of a transistor |
06/11/2002 | US6403978 Test pattern for measuring variations of critical dimensions of wiring patterns formed in the fabrication of semiconductor devices |
06/11/2002 | US6403934 Thermstrate reflow process |
06/11/2002 | US6403896 Substrate having specific pad distribution |
06/11/2002 | US6403895 Wiring substance and semiconductor |
06/11/2002 | US6403892 Coated means for connecting a chip and a card |
06/11/2002 | US6403882 Protective cover plate for flip chip assembly backside |
06/11/2002 | US6403876 A thermoelectric device with improved efficiency; reducing parasitic resistances. |
06/11/2002 | US6403485 Method to form a low parasitic capacitance pseudo-SOI CMOS device |
06/11/2002 | US6403480 Process for manufacturing semiconductor device |
06/11/2002 | US6403475 Fabrication method for semiconductor integrated device |
06/11/2002 | US6403467 Semiconductor device and method for manufacturing same |
06/11/2002 | US6403463 Method for fabricating a multichip module to improve signal transmission |
06/11/2002 | US6403462 Method for manufacturing high reliability interconnection having diffusion barrier layer |
06/11/2002 | US6403461 Method to reduce capacitance between metal lines |
06/11/2002 | US6403460 Method of making a semiconductor chip assembly |
06/11/2002 | US6403459 Fabrication process of semiconductor integrated circuit device |
06/11/2002 | US6403458 Method for fabricating local interconnect structure for integrated circuit devices, source structures |
06/11/2002 | US6403457 Selectively coating bond pads |
06/11/2002 | US6403429 Semiconductor processing methods of forming integrated circuitry, forming conductive lines, forming a conductive grid, forming a conductive network, forming an electrical interconnection to a node location, forming an electrical interconnection with a transistor source/drain region, and integrated circuitry |
06/11/2002 | US6403422 Semiconductor device and method of manufacturing the same |
06/11/2002 | US6403402 Semiconductor chip having an underplate metal layer |
06/11/2002 | US6403401 Heat spreader hole pin 1 identifier |
06/11/2002 | US6403400 Bumpless flip chip assembly with strips-in-via and plating |
06/11/2002 | US6403398 Semiconductor device, manufacturing method thereof and aggregate type semiconductor device |
06/11/2002 | US6403396 Method for generation of electrically conducting or semiconducting structures in three dimensions and methods for erasure of the same structures |
06/11/2002 | US6403389 Method for determining on-chip sheet resistivity |
06/11/2002 | US6403387 Method and apparatus for transfer molding encapsulation of a semiconductor die with attached heat sink |
06/11/2002 | US6403221 Epoxy resin containing phosphorus, phenolic curing agent, bisphenol s phenolic resin and accelerator; heat resistance; peeling strength |
06/11/2002 | US6403200 Insulator ceramic is composed of an magnesium oxide-magnesium aluminate (mgo-mgal2o4) ceramic powder, and a glass powder containing oxides of silicon, boron and with or without alumina, also contains oxides of 1a, 11a, zinc and copper |
06/11/2002 | US6403199 Insulating ceramic, multilayer ceramic substrate, ceramic electronic parts and laminated ceramic electronic parts |
06/11/2002 | US6402970 Method of making a support circuit for a semiconductor chip assembly |
06/11/2002 | US6402907 Method of forming a barrier layer |
06/11/2002 | US6402803 Spherical particles; from vaporized nickel chloride |
06/11/2002 | US6402537 Socket for removably mounting an electronic part |
06/11/2002 | US6402009 Apparatus and method for shaping lead frame for semiconductor device and lead frame for semiconductor device |
06/11/2002 | US6401810 Retaining structure of heat-radiating fins |
06/11/2002 | US6401808 Cooling apparatus for electronic devices and method |
06/11/2002 | US6401807 Folded fin heat sink and fan attachment |
06/11/2002 | US6401806 Heat sink assembly |
06/11/2002 | US6401805 Integrated venting EMI shield and heatsink component for electronic equipment enclosures |
06/11/2002 | US6401765 Lead frame tooling design for exposed pad features |
06/11/2002 | US6401580 Method for sawing wafers employing multiple indexing techniques for multiple die dimensions |
06/06/2002 | WO2002045470A1 Substrate and production method therefor |
06/06/2002 | WO2002045168A1 Semiconductor device |
06/06/2002 | WO2002045166A2 Method for eliminating crack damage at interfaces in integrated circuits |
06/06/2002 | WO2002045165A2 Compact semiconductor structure and a method for producing the same |
06/06/2002 | WO2002045164A2 Thermally and electrically enhanced ball grid array packaging |
06/06/2002 | WO2002045163A2 Method for producing semiconductor modules and a module produced according to said method |
06/06/2002 | WO2002045162A2 Interposer for a semiconductor module, semiconductor produced using such an interposer and method for producing such an interposer |
06/06/2002 | WO2002045161A1 Integral-type ceramic circuit board and method of producing same |
06/06/2002 | WO2002045160A1 Flexible electronic device |
06/06/2002 | WO2002045152A2 Flip chip mounting technique |
06/06/2002 | WO2002045151A1 Semiconductor package and its manufacturing method |
06/06/2002 | WO2002045150A1 Spontaneous emission enhanced heat transport method and structures for cooling, sensing, and power generation |
06/06/2002 | WO2002045142A2 Copper alloy interconnections for integrated circuits and methods of making same |
06/06/2002 | WO2002045139A1 Method for identifying semiconductor integrated circuit device, method for manufacturing semiconductor integrated circuit device, semiconductor integrated circuit device and semiconductor chip |
06/06/2002 | WO2002044241A1 Liquid epoxy resin composition for encapsulating material |
06/06/2002 | WO2002044011A2 Offshor platform for hydrocarbon production and storage |
06/06/2002 | WO2002023631A3 Direct build-up layer on an encapsulated die package having a moisture barrier structure |
06/06/2002 | WO2002018960A3 Device and method for characterizing the version of integrated circuits and use for controlling operations |
06/06/2002 | WO2002009485A3 Flip chip package, circuit board thereof and packaging method thereof |
06/06/2002 | WO2002009484A3 Electrical component assembly and method of fabrication |
06/06/2002 | WO2002003457A3 Via first dual damascene process for copper metallization |
06/06/2002 | WO2001093329A3 Faraday cage for an integrated circuit |
06/06/2002 | WO2001087521A3 High conductivity copper/refractory metal composites and method for making same |
06/06/2002 | WO2001078141A3 USE OF AlN AS COPPER PASSIVATION LAYER AND THERMAL CONDUCTOR |
06/06/2002 | WO2001073866A3 Method and apparatus for integrated-battery devices |
06/06/2002 | WO2001043189A3 Integrated electronic circuit with at least one inductor and method for producing such a circuit |
06/06/2002 | WO2000067314A9 Stackable flex circuit ic package and method of making the same |
06/06/2002 | US20020068453 Photoresist layer is photolithographically patterned to form holes which overlie interconnect areas; etched using Reactive Ion Etching to insulating layer; etched to stop layer; photoresist removed and antireflective layer etched |
06/06/2002 | US20020068449 Method of depositing a copper seed layer which promotes improved feature surface coverage |
06/06/2002 | US20020068447 Method of forming a pattern for a semiconductor device |
06/06/2002 | US20020068445 First coat of the adhesion layer has a thickness on the bottom greater than the thickness on the sidewall. To compensate, a second coat is deposited that is thicker on the sidewalls that on the bottom |
06/06/2002 | US20020068443 Semiconductor device and method of fabricating the same |
06/06/2002 | US20020068442 Opening of a downwardly protruding window for a dual damascene structure |
06/06/2002 | US20020068441 Top layers of metal for high performance IC's |
06/06/2002 | US20020068437 Etching stop spacer is formed on each sidewall of the conductive wire; inter-metal dielectric layer is formed over the substrate patterned to form a via opening that exposes the conductive wire; metal plugging entire via hole |
06/06/2002 | US20020068433 Barrier layer comprising titanium nitride over a topographical structure on a field oxide region within a semiconductor substrate. A hard mask layer comprising tungsten silicide is formed over the first barrier layer. |
06/06/2002 | US20020068431 Encapsulated metal structures for semiconductor devices and MIM capacitors including the same |
06/06/2002 | US20020068428 Semiconductor device and method of manufacturing the same |
06/06/2002 | US20020068427 Single step process for blanket-selective cvd aluminum deposition |
06/06/2002 | US20020068426 Microelectronic packages having deformed bonded leads and methods therefor |
06/06/2002 | US20020068424 Semiconductor device and method of manufacturing the same, circuit board, and electronic instrument |
06/06/2002 | US20020068422 Heat treatment apparatus and method of manufacturing a semiconductor device |
06/06/2002 | US20020068411 Method for manufacturing diode subassemblies used in rectifier assemblies of engine driven generators |
06/06/2002 | US20020068404 Stable high voltage semiconductor device structure |
06/06/2002 | US20020068397 Stacked local interconnect structure and method of fabricating same |
06/06/2002 | US20020068389 Fexible electronic device |
06/06/2002 | US20020068385 Method for forming anchored bond pads in semiconductor devices and devices formed |