Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
07/2002
07/30/2002US6426642 Insert for seating a microelectronic device having a protrusion and a plurality of raised-contacts
07/30/2002US6426566 Anisotropic conductor film, semiconductor chip, and method of packaging
07/30/2002US6426565 Electronic package and method of making same
07/30/2002US6426562 Mask repattern process
07/30/2002US6426561 Short-circuit-resistant IGBT module
07/30/2002US6426560 Semiconductor device and memory module
07/30/2002US6426559 Miniature 3D multi-chip module
07/30/2002US6426558 Metallurgy for semiconductor devices
07/30/2002US6426557 Self-aligned last-metal C4 interconnection layer for Cu technologies
07/30/2002US6426556 Reliable metal bumps on top of I/O pads with test probe marks
07/30/2002US6426555 Bonding pad and method for manufacturing it
07/30/2002US6426554 Semiconductor device
07/30/2002US6426552 Methods employing hybrid adhesive materials to secure components of semiconductor device assemblies and packages to one another and assemblies and packages including components secured to one another with such hybrid adhesive materials
07/30/2002US6426551 Composite monolithic electronic component
07/30/2002US6426550 Interleaved signal trace routing
07/30/2002US6426549 Stackable flex circuit IC package and method of making same
07/30/2002US6426548 Semiconductor device, lead-patterning substrate, and electronics device, and method for fabricating same
07/30/2002US6426546 Reducing relative stress between HDP layer and passivation layer
07/30/2002US6426545 Integrated circuit structures and methods employing a low modulus high elongation photodielectric
07/30/2002US6426544 Flexible interconnections with dual-metal dual-stud structure
07/30/2002US6426543 Semiconductor device including high-frequency circuit with inductor
07/30/2002US6426537 Ultra-thin piezoelectric resonator
07/30/2002US6426534 Methods and circuits employing threshold voltages for mask-alignment detection
07/30/2002US6426531 Semiconductor integrated circuit device and a method of assembly thereof
07/30/2002US6426516 Kerf contact to silicon redesign for defect isolation and analysis
07/30/2002US6426484 Circuit and method for heating an adhesive to package or rework a semiconductor die
07/30/2002US6426468 Circuit board
07/30/2002US6426467 Film carrier with adjacent electrical sorting pads
07/30/2002US6426461 Enclosure for electronic components
07/30/2002US6426380 Forming addition-crosslinked silicone rubber absorber material via curing mixture of polysiloxane and hardener; dehydrogenation; preventing hydrogen accumulation in semiconductor array/wafer within hermetically sealed housing
07/30/2002US6426371 Hydrolysis; condensation
07/30/2002US6426310 Fabric comprising para-aramid fiber chops bonded with each other by binder, including chops of poly-para-phenylene-diphenylether terephthalamide fibers and poly-para-phenylene terephthalamide fibers
07/30/2002US6426294 Polishing conductive material film comprising copper or copper alloy using aqueous composition comprising pyridine-based carboxylic acid and acid having one carboxyl and one hydroxyl group or oxalic acid, abrasive grains and oxidizing agent
07/30/2002US6426287 Method for forming a semiconductor connection with a top surface having an enlarged recess
07/30/2002US6426284 Method of manufacturing wire bond pad
07/30/2002US6426282 Method of forming solder bumps on a semiconductor wafer
07/30/2002US6426249 Buried metal dual damascene plate capacitor
07/30/2002US6426247 Low bitline capacitance structure and method of making same
07/30/2002US6426244 Process of forming a thick oxide field effect transistor
07/30/2002US6426242 Semiconductor chip packaging method
07/30/2002US6426241 Method for forming three-dimensional circuitization and circuits formed
07/30/2002US6426240 Stackable flex circuit chip package and method of making same
07/30/2002US6426176 Forming metal bump of first material on substrate so that bump electrically contacts metal part on substrate, forming protective layer on metal bump which has higher conductivity than first material
07/30/2002US6426154 Ceramic circuit board
07/30/2002US6426127 Dielectric coating on surface
07/30/2002US6425771 IC socket
07/30/2002US6425516 Semiconductor device and method of production of the same
07/30/2002US6425439 Cooling device with micro cooling fin
07/30/2002US6425179 Method for assembling tape ball grid arrays
07/30/2002CA2187477C Self align leadframe
07/25/2002WO2002058155A1 Semiconductor chip with internal esd matching
07/25/2002WO2002058154A2 Semiconductor component comprising esd protection
07/25/2002WO2002058152A2 Electronic circuit device and method for manufacturing the same
07/25/2002WO2002058149A1 Power transistor with internally combined low-pass and band-pass matching stages
07/25/2002WO2002058148A1 Apparatus and method for forming a battery in an integrated circuit
07/25/2002WO2002058147A2 Method and structure to reduce the damage associated with programming electrical fuses
07/25/2002WO2002058146A1 Semiconductor device with an improved transmission line
07/25/2002WO2002058145A2 Layered dielectric nanoporous materials and methods of producing same
07/25/2002WO2002058144A1 Electroless ni/pd/au metallization structure for copper interconnect substrate and method therefor
07/25/2002WO2002058143A2 Cvd diamond enhanced microprocessor cooling system
07/25/2002WO2002058142A2 Power module
07/25/2002WO2002058140A2 Integrated inductor
07/25/2002WO2002058139A2 Diamondoid-containing materials in microelectronics
07/25/2002WO2002058138A2 An electronic assembly having a heat pipe that conducts heat from a semiconductor die
07/25/2002WO2002058137A2 Composite microelectronic spring structure and method for making same
07/25/2002WO2002058135A2 Interconnect structures and a method of electroless introduction of interconnect structures
07/25/2002WO2002058131A1 Method for making a semiconductor package and semiconductor package with integrated circuit chips
07/25/2002WO2002058117A2 Metal-insulator-metal capacitor in copper
07/25/2002WO2002058112A2 Copper diffusion barriers
07/25/2002WO2002058108A2 Wafer applied fluxing and underfill material, and layered electronic assemblies manufactured therewith
07/25/2002WO2002057361A2 Curing agent for epoxy resins and epoxy resin composition
07/25/2002WO2002057333A2 Epoxy resin composition for semiconductor encapsulation
07/25/2002WO2002056912A2 Pharmaceutical combination for the treatment of cancer containing a 4-quinazolineamine and another anti-neoplastic agent
07/25/2002WO2002027789B1 Connecting device
07/25/2002WO2001098793A3 Systems for testing integraged circuits during burn-in
07/25/2002WO2001075938A3 Leadless semiconductor product packaging apparatus having a window lid and method for packaging
07/25/2002WO2001073865A3 Continuous processing of thin-film batteries and like devices
07/25/2002WO2001002468A9 Composites of powdered fillers and polymer matrix and process for preparing them
07/25/2002US20020100010 Field programmable printed circuit board
07/25/2002US20020099158 Polyarylene compositions with enhanced modulus profiles
07/25/2002US20020098965 Containing a diopside crystal phase and a cordierite phase, the remainder being a glass phase and/or other ceramic crystal phases, and having an open porosity of not larger than 1%.
07/25/2002US20020098714 Method for fabricating an ultralow dielectric constant material as an intralevel or interlevel dielectric in a semiconductor device
07/25/2002US20020098711 Electroless deposition of doped noble metals and noble metal alloys
07/25/2002US20020098707 Design of lithography alignment and overlay measurement marks on CMP finished damascene surface
07/25/2002US20020098691 Method of manufacturing a semiconductor device and the semiconductor device manufactured by the method
07/25/2002US20020098683 Semiconductor device manufacturing method using metal silicide reaction after ion implantation in silicon wiring
07/25/2002US20020098681 Reduced electromigration and stressed induced migration of Cu wires by surface coating
07/25/2002US20020098680 Integrated circuit trenched features and method of producing same
07/25/2002US20020098679 Method for producing an integrated circuit having at least one metalicized surface
07/25/2002US20020098677 Multilevel copper interconnects with low-k dielectrics and air gaps
07/25/2002US20020098672 Semiconductor device with fully self-aligned local interconnects, and method for fabricating the device
07/25/2002US20020098670 Semiconductor integrated circuit device and fabrication method for semiconductor integrated circuit device
07/25/2002US20020098626 UV cured polymeric semiconductor die coating
07/25/2002US20020098625 Conductive hardening resin for a semiconductor device and semiconductor device using the same
07/25/2002US20020098624 Tape under frame for conventional-type IC package assembly
07/25/2002US20020098623 Semiconductor device including leads in communication with contact pads thereof and a stereolithographically fabricated package substantially encapsulating the leads and methods for fabricating the same
07/25/2002US20020098622 Heat-dissipating device of a semiconductor device and fabrication method for same
07/25/2002US20020098619 Wafer on wafer packaging and method of fabrication for full-wafer burn-in and testing
07/25/2002US20020098617 CD BGA package and a fabrication method thereof
07/25/2002US20020098608 Method and apparatus for marking a bare semiconductor die