Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 23 - Details of semiconductor or other solid state devices
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
08/2002
08/13/2002US6432239 Method of producing ceramic multilayer substrate
08/13/2002US6432182 Treatment solution for reducing adhesive resin bleed
08/13/2002US6431456 IC card
08/13/2002US6431432 Method for attaching solderballs by selectively oxidizing traces
08/13/2002US6431260 Cavity plate and jet nozzle assemblies for use in cooling an electronic module, and methods of fabrication thereof
08/13/2002US6431259 Spring clip for fixing semiconductor modules to a heat sink
08/13/2002US6430943 Controlled production of ammonia
08/13/2002US6430936 Photonic microheatpipes
08/13/2002CA2242234C Cooling structure of multichip module and method of manufacturing it
08/13/2002CA2095363C Plastisol composition
08/08/2002WO2002062118A1 A stackable microcircuit layer formed from a plastic encapsulated microcircuit and method of making the same
08/08/2002WO2002062117A1 Method for jointing electronic parts
08/08/2002WO2002061898A1 Mounting of optical device on heat sink
08/08/2002WO2002061886A1 Contact assembly for land grid array interposer or electrical connector
08/08/2002WO2002061839A1 Semiconductor integrated circuit device
08/08/2002WO2002061836A1 High voltage semiconductor device
08/08/2002WO2002061835A1 Semiconductor device and its manufacturing method
08/08/2002WO2002061833A2 Substrate for an electric component and method for the production thereof
08/08/2002WO2002061832A1 Unmolded package for a semiconductor device
08/08/2002WO2002061831A1 Method for coupling a chip to an isotropic coupling layer
08/08/2002WO2002061830A1 Heat dissipation type semiconductor package and method of fabricating the same
08/08/2002WO2002061826A2 Area efficient stacking of antifuses in semiconductor device
08/08/2002WO2002061825A2 Electronic assembly with high capacity thermal interface and methods of manufacture
08/08/2002WO2002061822A1 Method and apparatus for removing a carrier part from a carrier, and a product removed from a carrier
08/08/2002WO2002061805A2 High power radiation emitter device and heat dissipating package for electronic components
08/08/2002WO2002061804A2 Semiconductor package with lid heat spreader
08/08/2002WO2002061802A2 Metal-to-metal antifuse structure and fabrication method
08/08/2002WO2002061765A1 Composite particle for dielectrics, ultramicroparticulate composite resin particle, composition for forming dielectrics and use thereof
08/08/2002WO2002061764A1 Compliant and crosslinkable thermal interface materials
08/08/2002WO2002060810A2 Micro-element substrate interconnection
08/08/2002WO2002060669A1 Injection molded heat dissipation device
08/08/2002WO2002039131A3 Method for locating defects and measuring resistance in a test structure
08/08/2002WO2002003423A3 Capacitor and capacitor contact process for stack capacitor drams
08/08/2002US20020107675 Wiring failure analysis method using simulation of electromigration
08/08/2002US20020107603 Method of efficiently laser marking singulated semiconductor devices
08/08/2002US20020107140 Electrocatalyst powders, methods for producing powders and devices fabricated from same
08/08/2002US20020106908 Precleaning process for metal plug that minimizes damage to low-kappa dielectric
08/08/2002US20020106903 Manufacturing method of semiconductor device
08/08/2002US20020106893 Structure and process for multi-chip chip attach with reduced risk of electrostatic discharge damage
08/08/2002US20020106890 Method for multilevel copper interconnects for ultra large scale integration
08/08/2002US20020106885 Method of fabricating a slot dual damascene structure without middle stop layer
08/08/2002US20020106884 Method for multilevel copper interconnects for ultra large scale integration
08/08/2002US20020106878 Methods and apparatus for providing improved physical designs and routing with reduced capacitive power dissipation
08/08/2002US20020106844 Method for manufacturing semiconductor device
08/08/2002US20020106843 Array substrate for display, method of manufacturing array substrate for display and display device using the array substrate
08/08/2002US20020106838 Formation of antifuse structure in a three dimensional memory
08/08/2002US20020106837 Method of generating integrated circuit feature layout for improved chemical mechanical polishing
08/08/2002US20020106836 Semiconductor device and a method of manufacturing the same
08/08/2002US20020106835 Single layer surface mount package
08/08/2002US20020106833 Semiconductor device and method for fabricating same
08/08/2002US20020106831 Method for laminating and mounting semiconductor chip
08/08/2002US20020106825 Method for manufacturing a liquid crystal display
08/08/2002US20020106516 Free of halogen elements, flame retardancy, water resistance, heat resistance, peeling strength
08/08/2002US20020106515 Novel high temperature underfilling material with low exotherm during use
08/08/2002US20020106169 Lead frame, optical module, and a method of optical module
08/08/2002US20020105981 Semiconductor laser device which removes influences from returning light of three beams and a method of manufacturing the same
08/08/2002US20020105789 Semiconductor package for multi-chip stacks
08/08/2002US20020105785 Circuit board support
08/08/2002US20020105783 Electronic system having electronic apparatus with built-in heat generating component and cooling apparatus to cool the electronic apparatus
08/08/2002US20020105769 Load control apparatus and method having single temperature detector
08/08/2002US20020105591 Solid-state image pickup apparatus and fabricating method thereof
08/08/2002US20020105380 CMOS transceiver having an integrated power amplifier
08/08/2002US20020105097 PAD arrangement in semiconductor memory device and method of driving semiconductor device
08/08/2002US20020105096 Semiconductor device with connection terminals in the form of a grid array
08/08/2002US20020105095 Semiconductor package having a substrate including a die-attach aperture and method for packaging a semiconductor die
08/08/2002US20020105093 Encapsulant composition and electronic package utilizing same
08/08/2002US20020105092 Flip chip semiconductor device in a molded chip scale package (CSP) and method of assembly
08/08/2002US20020105091 Dual package semiconductor device
08/08/2002US20020105090 Wiring forming method for semiconductor device and semiconductor device
08/08/2002US20020105089 Semiconductor device and manufacturing method thereof
08/08/2002US20020105088 Semiconductor device having multilayer interconnection structure and manfacturing method thereof
08/08/2002US20020105087 High performance silicon contact for flip chip
08/08/2002US20020105086 Semiconductor device and method for manufacturing the same
08/08/2002US20020105085 Semiconductor device and process for producing the same
08/08/2002US20020105084 Low dielectric constant material for integrated circuit fabrication
08/08/2002US20020105083 Multi-layer interconnect module and method of interconnection
08/08/2002US20020105082 Method for forming interconnects on semiconductor substrates and structures formed
08/08/2002US20020105081 Self-assembled near-zero-thickness molecular layers as diffusion barriers for Cu metallization
08/08/2002US20020105079 Semiconductor device
08/08/2002US20020105078 Semiconductor device, a method for making the same, and an LCD monitor comprising the same
08/08/2002US20020105077 Semiconductor package having changed substrate design using special wire bonding
08/08/2002US20020105076 Reliable metal bumps on top of i/o pads with test probe marks
08/08/2002US20020105073 Low cost and compliant microelectronic packages for high i/o and fine pitch
08/08/2002US20020105072 Integrated circuit package configuration having an encapsulating body with a flanged portion and an encapsulating mold for molding the encapsulating body
08/08/2002US20020105071 Electronic assembly with high capacity thermal spreader and methods of manufacture
08/08/2002US20020105070 Semiconductor device, manufacturing method thereof and mounting board
08/08/2002US20020105069 Semiconductor device including stud bumps as external connection terminals
08/08/2002US20020105068 Stacked semiconductor device structure
08/08/2002US20020105067 Semiconductor chip package
08/08/2002US20020105064 Grounding of package substrates
08/08/2002US20020105063 Stress-free lead frame
08/08/2002US20020105062 Interface device and interface system
08/08/2002US20020105061 Semiconductor device and manufacturing method thereof
08/08/2002US20020105060 Lead frame with raised leads and plastic packaged semiconductor device using the same
08/08/2002US20020105059 Alpha particle shield for integrated circuit
08/08/2002US20020105058 Magnetic shielding for integrated circuits
08/08/2002US20020105056 Arrangement of stacked, spherically-shaped semiconductors
08/08/2002US20020105051 Structures and methods of anti-fuse formation in SOI
08/08/2002US20020105045 Semiconductor device and chip carrier
08/08/2002US20020105042 Flexible circuit with two stiffeners for optical module packaging
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