Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
08/2002
08/20/2002US6437653 Method and apparatus for providing a variable inductor on a semiconductor chip
08/20/2002US6437454 Semiconductor base material having fine dot mark
08/20/2002US6437453 Wire bonding method, semiconductor device, circuit board, electronic instrument and wire bonding device
08/20/2002US6437452 Substrate having vias with pre-formed leads connecting semiconductor to substrate circuitry; for use in high density, high performance semiconductor packaging; low cost
08/20/2002US6437450 Method of mounting semiconductor chip
08/20/2002US6437449 Making semiconductor devices having stacked dies with biased back surfaces
08/20/2002US6437448 Semiconductor device adapted for mounting on a substrate
08/20/2002US6437447 Dual-sided chip package without a die pad
08/20/2002US6437446 Semiconductor device having first and second chips
08/20/2002US6437443 Multiphase low dielectric constant material and method of deposition
08/20/2002US6437441 Wiring structure of a semiconductor integrated circuit and a method of forming the wiring structure
08/20/2002US6437440 Thin film metal barrier for electrical interconnections
08/20/2002US6437438 Eddy current limiting thermal plate
08/20/2002US6437437 Semiconductor package with internal heat spreader
08/20/2002US6437436 Integrated circuit chip package with test points
08/20/2002US6437435 Vertically mountable interposer, assembly and method
08/20/2002US6437434 Semiconductor device and semiconductor device mounting interconnection board
08/20/2002US6437432 Semiconductor device having improved electrical characteristics and method of producing the same
08/20/2002US6437431 Die power distribution system
08/20/2002US6437430 Semiconductor apparatus and frame used for fabricating the same
08/20/2002US6437429 Semiconductor package with metal pads
08/20/2002US6437428 Ball grid array type semiconductor package having a flexible substrate
08/20/2002US6437427 Lead frame used for the fabrication of semiconductor packages and semiconductor package fabricated using the same
08/20/2002US6437426 Semiconductor integrated circuit having an improved grounding structure
08/20/2002US6437425 Semiconductor devices which utilize low K dielectrics
08/20/2002US6437423 Method for fabricating semiconductor components with high aspect ratio features
08/20/2002US6437421 Self-aligned dual-base semiconductor process and structure incorporating multiple bipolar device types
08/20/2002US6437420 Semiconductor elements for semiconductor device
08/20/2002US6437418 High quality factor, integrated inductor and production method thereof
08/20/2002US6437411 Semiconductor device having chamfered silicide layer and method for manufacturing the same
08/20/2002US6437409 Semiconductor device
08/20/2002US6437365 Raised tungsten plug antifuse and fabrication processes
08/20/2002US6437364 Internal probe pads for failure analysis
08/20/2002US6437254 Apparatus and method for printed circuit board repair
08/20/2002US6437253 Terminal structure to which an electronic component is to be bonded
08/20/2002US6437240 Microelectronic connections with liquid conductive elements
08/20/2002US6437026 Hardener for epoxy molding compounds
08/20/2002US6436842 Semiconductor wafer including a dot mark of a peculiar shape and method of forming the dot mark
08/20/2002US6436839 Increasing programming silicide process window by forming native oxide film on amourphous Si after metal etching
08/20/2002US6436827 Fabrication method of a semiconductor device
08/20/2002US6436826 Chemical enhancer layer formed on damascene pattern which is filled with copper using mocvd; enhancer exposed to plasma or radical plasma process so that it remains only within a bottom portion of damascene pattern.
08/20/2002US6436819 Formation of a metal nitride/metal stack suitable for use as a barrier/liner exposed to a treatment step in a nitrogen-containing environment, e.g., a plasma. the plasma treatment modifies the entire metal nitride layer
08/20/2002US6436814 Interconnection structure and method for fabricating same
08/20/2002US6436813 Interlayer insulating film formed on one main surface of the semiconductor substrate and having a concave portion, a liner film formed on the inner surface of concave wire layer
08/20/2002US6436812 Multilayer; etch barrier, hard mask and antireflectivity layer
08/20/2002US6436807 Method for making an interconnect layer and a semiconductor device including the same
08/20/2002US6436804 Semiconductor integrated circuit device, semiconductor integrated circuit wiring method, and cell arranging method
08/20/2002US6436803 Manufacturing computer systems with fine line circuitized substrates
08/20/2002US6436802 Method of producing contact structure
08/20/2002US6436738 Silicide agglomeration poly fuse device
08/20/2002US6436737 Method for reducing soft error rates in semiconductor devices
08/20/2002US6436736 Method for manufacturing a semiconductor package on a leadframe
08/20/2002US6436735 Method for mounting an integrated circuit having reduced thermal stresses between a bond pad and a metallic contact
08/20/2002US6436734 Method of making a support circuit for a semiconductor chip assembly
08/20/2002US6436733 Bonding layer method in a semiconductor device
08/20/2002US6436731 Connecting semiconductor chip to housing; precleaning
08/20/2002US6436730 Microelectronic package comprising tin copper solder bump interconnections and method for forming same
08/20/2002US6436726 Methods and circuits for mask-alignment detection
08/20/2002US6436723 Ozone water containing an oxidation agent having an oxidation-reduction potential of 2v or more is supplied onto a metal compound film such as srruo film or the like, and the metal compound film is etched by oxidation-reduction reaction
08/20/2002US6436602 Method of repairing a defective portion in an electronic device
08/20/2002US6436585 Creating an electrical fuse on a semiconductor structure comprising: determining a pattern for a desired electrical fuse, said pattern including a fuse portion of substantially constant width except for a localized region
08/20/2002US6436550 Sintered compact and method of producing the same
08/20/2002US6436506 Transferrable compliant fibrous thermal interface
08/20/2002US6436331 Method of resin sealing a gap between a semiconductor chip and a substrate
08/20/2002US6436316 Thick film conductors
08/20/2002US6436302 Post CU CMP polishing for reduced defects
08/20/2002US6435883 High density multichip interconnect decal grid array with epoxy interconnects and transfer tape underfill
08/20/2002US6435414 Electronic module for chip card
08/20/2002US6435400 Bondhead lead clamp apparatus and method
08/20/2002US6435396 Print head for ejecting liquid droplets
08/20/2002US6435394 Transporter for lead frames and transport assembly
08/20/2002US6435267 Apparatus to enhance cooling of electronic device
08/20/2002US6434817 Method for joining an integrated circuit
08/20/2002CA2115553C Plated compliant lead
08/15/2002WO2002063934A1 Interconnect
08/15/2002WO2002063896A1 Wireless local loop antenna
08/15/2002WO2002063688A1 Hybrid integrated circuit device and method for fabricating the same and electronic device
08/15/2002WO2002063687A2 Screening device for integrated circuits
08/15/2002WO2002063686A2 High performance silicon contact for flip chip
08/15/2002WO2002063684A2 Single layer surface mount package
08/15/2002WO2002063683A2 Method of manufacturing a semiconductor device and a semiconductor device obtained by means of said method
08/15/2002WO2002063682A2 Lithographic type microelectronic spring structures with improved contours
08/15/2002WO2002063681A1 Semiconductor integrated circuit device and its manufacturing method
08/15/2002WO2002063676A2 A slot via filled dual damascene structure without middle stop layer and method for making the same
08/15/2002WO2002063675A1 Integrated circuit, method of testing integrated circuit and method of manufacturing integrated circuit
08/15/2002WO2002063674A1 Lead-free solder structure and method for high fatigue life
08/15/2002WO2002063672A1 Method for multilevel copper interconnects for ultra large scale integration
08/15/2002WO2002062588A1 Electronic device and method of manufacturing the same
08/15/2002WO2002026479A3 Carbon-carbon fiber composite heat spreader
08/15/2002WO2002025777A3 Press (non-soldered) contacts for high current electrical connections in power modules
08/15/2002WO2002019427A3 Integrated circuit package incorporating camouflaged programmable elements
08/15/2002WO2001047016A9 Method and apparatus for encoding information in an ic package
08/15/2002WO2001039255A9 Radiation shield and radiation shielded integrated circuit device
08/15/2002WO2001039220A9 Inductor for integrated circuit and methods of manufacture
08/15/2002WO2001026145A9 Seed layers for interconnects and methods and apparatus for their fabrication
08/15/2002WO2001013431A9 Apparatuses for forming wire bonds from circuitry on a substrate to a semiconductor chip, and methods of forming semiconductor chip assemblies
08/15/2002US20020111420 Core-shell polymers; encapsulation
08/15/2002US20020111055 Anisotropic conductive film and production method thereof
08/15/2002US20020111054 Ball grid array package and its fabricating process
08/15/2002US20020111053 Interconnection structure of semiconductor element