| Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155) |
|---|
| 08/06/2002 | US6429386 Imbedded die-scale interconnect for ultra-high speed digital communications |
| 08/06/2002 | US6429382 Electrical mounting structure having an elution preventive film |
| 08/06/2002 | US6429381 High density interconnect multichip module stack and fabrication method |
| 08/06/2002 | US6429372 Semiconductor device of surface mounting type and method for fabricating the same |
| 08/06/2002 | US6429238 Liquid epoxy resin and modified polyethersiloxane cured with imidazole-derived cure accelerator; sealing material for flip-chip semiconductor devices; improved thin-film infiltration and storage stability; no need to clean flux |
| 08/06/2002 | US6429147 Method for making an insulating film |
| 08/06/2002 | US6429129 Incorporating fluorinated amorphous carbon and fluorocarbon polymers in formation of interconnects; blocking diffusion of fluorine |
| 08/06/2002 | US6429128 Method of forming nitride capped Cu lines with reduced electromigration along the Cu/nitride interface |
| 08/06/2002 | US6429126 Reduced fluorine contamination for tungsten CVD |
| 08/06/2002 | US6429124 Local interconnect structures for integrated circuits and methods for making the same |
| 08/06/2002 | US6429121 Method of fabricating dual damascene with silicon carbide via mask/ARC |
| 08/06/2002 | US6429116 Depositing a diffusion barrier/etch stop layer over a conductive layer, then depositing an organic low k dielectric material thereon; etching and depositing an inorganic low k dielectric in the slot via; slot via wider than the trench |
| 08/06/2002 | US6429114 Method for fabricating a multilayer ceramic substrate |
| 08/06/2002 | US6429113 Method for connecting an electrical device to a circuit substrate |
| 08/06/2002 | US6429112 Multi-layer substrates and fabrication processes |
| 08/06/2002 | US6429105 Forming metal such as copper interconnect line using chemical mechanical polishing; film forming tetraethylorthosilicate and noble gas impregnated fluorosilicate glass layers; reducing interface and wiring resistance |
| 08/06/2002 | US6429096 Method of making thinned, stackable semiconductor device |
| 08/06/2002 | US6429090 Preventing charge accumulation without reducing contrast; maintaining low thermal expansion; plate, heavy metal mark of such as tantalum, tungsten or platinum and electro-conductive layer of such as titanium, chromium or aluminum |
| 08/06/2002 | US6429089 Preventing chemical reduction of capacitive film; forming capacitor of such as tantalum oxide; intermediate insulation layer with contact hole plugged with electrical conductor; covering with silicon nitride film impermeable to hydrogen |
| 08/06/2002 | US6429051 Stitched plane structure for package power delivery and dual referenced stripline I/O performance |
| 08/06/2002 | US6429050 Fine pitch lead frame and method |
| 08/06/2002 | US6429049 Laser method for forming vias |
| 08/06/2002 | US6429048 Metal foil laminated IC package |
| 08/06/2002 | US6429047 Semiconductor package which has no resinous flash formed on lead frame and method for manufacturing the same |
| 08/06/2002 | US6429045 Structure and process for multi-chip chip attach with reduced risk of electrostatic discharge damage |
| 08/06/2002 | US6429044 Method and apparatus for magnetic shielding of an integrated circuit |
| 08/06/2002 | US6429043 Semiconductor circuitry device and method for manufacturing the same |
| 08/06/2002 | US6429042 Method of reducing shear stresses on IC chips and structure formed thereby |
| 08/06/2002 | US6429031 Method for forming wiring pattern of a semiconductor integrated circuit |
| 08/06/2002 | US6429029 Concurrent design and subsequent partitioning of product and test die |
| 08/06/2002 | US6428908 Substrate of narrow and flexible strip conductor with aperture extending to tower face; deformed bond head larger than through hole |
| 08/06/2002 | US6428903 Prevention of bacterial adhesion and biofilms on computers, semiconductors, integrated circuits, and microelectronics |
| 08/06/2002 | US6428886 Method for attenuating thermal sensation when handling objects at non-body temperature |
| 08/06/2002 | US6428741 Aluminum nitride sintered body and method of preparing the same |
| 08/06/2002 | US6428641 Method for laminating circuit pattern tape on semiconductor wafer |
| 08/06/2002 | US6427976 Lead-frame-based chip-scale package and method of manufacturing the same |
| 08/06/2002 | US6427903 Solder ball placement apparatus |
| 08/06/2002 | US6427763 Air rectification blades |
| 08/06/2002 | US6427676 Method for sawing wafers employing multiple indexing techniques for multiple die dimensions |
| 08/06/2002 | US6427324 Inherently robust repair process for thin film circuitry using UV laser |
| 08/01/2002 | WO2002060229A1 A method for the implementation of electronic components in via-holes of a multi-layer multi-chip module |
| 08/01/2002 | WO2002059970A2 Mos transistor |
| 08/01/2002 | WO2002059969A1 Semiconductor device |
| 08/01/2002 | WO2002059968A2 Integrated circuits protected against reverse engineering using an apparent metal contact line terminating on field oxide and method |
| 08/01/2002 | WO2002059967A2 Integrated circuits protected against reverse engineering and method for fabricating the same using vias without metal terminations |
| 08/01/2002 | WO2002059966A1 Planarizers for spin etch planarization of electronic components and methods of use thereof |
| 08/01/2002 | WO2002059965A1 Clean release, phase change thermal interface |
| 08/01/2002 | WO2002059964A2 Integrated circuits protected against reverse engineering and method for fabricating the same using etched passivation openings in passivation layer |
| 08/01/2002 | WO2002059962A2 Viscous protective overlayers for planarization of integrated circuits |
| 08/01/2002 | WO2002059958A2 Aqueous nonferrous feedstock material for injection molding |
| 08/01/2002 | WO2002059944A2 Optimized liners for dual damascene metal wiring |
| 08/01/2002 | WO2002059921A1 High-$i(q) micromechanical device and method of tuning same |
| 08/01/2002 | WO2002059902A1 Semiconductor device manufacturing method and semiconductor device |
| 08/01/2002 | WO2002059398A2 Plating apparatus and method |
| 08/01/2002 | WO2002059392A1 Method for growing carbon nanotubes above a base that is to be electrically contacted and a component |
| 08/01/2002 | WO2002059176A1 Curable resin, curable resin material, curable film, and insulator |
| 08/01/2002 | WO2002037557A3 Method for producing an integrated circuit, at least partially transforming an oxide layer into a conductive layer |
| 08/01/2002 | WO2002025702A3 Semiconductor product with a silver and gold alloy |
| 08/01/2002 | WO2001084581B1 Predetermined symmetrically balanced amalgam with complementary paired portions comprising shielding electrodes and shielded electrodes and other predetermined element portions for symmetrically balanced and complementary energy portion conditioning |
| 08/01/2002 | WO2001029847A9 Infiltrated nanoporous materials and methods of producing same |
| 08/01/2002 | WO2001028003A9 Face-to-face chips |
| 08/01/2002 | US20020103394 Organometallic copper complex and preparation of copper thin film by CVD |
| 08/01/2002 | US20020103318 Electronic component with an insulating layer formed from fluorinated norbornene polymer and method for manufacturing the insulating layers |
| 08/01/2002 | US20020102870 Flexible circuit connector for stacked chip module |
| 08/01/2002 | US20020102868 Contact assembly for land grid array interposer or electrical connector |
| 08/01/2002 | US20020102844 Methods of fabricating integrated circuitry, method of forming a local interconnect, and method of forming a conductive line |
| 08/01/2002 | US20020102838 Microelectronic interconnect material with adhesion promotion layer and fabrication method |
| 08/01/2002 | US20020102836 Stacked local interconnect structure and method of fabricating same |
| 08/01/2002 | US20020102835 Method of fabrication and device for electromagnetic-shielding structures in a damascene-based interconnect scheme |
| 08/01/2002 | US20020102833 Integrated circuit packages and the method for the same |
| 08/01/2002 | US20020102831 Method for fabricating BOC semiconductor package |
| 08/01/2002 | US20020102829 Stereolithographically fabricated conductive elements, semiconductor device components and assemblies including such conductive elements, and methods |
| 08/01/2002 | US20020102826 Chemical vapor deposition using an organoruthenium precursor, limiting introduction of the oxidation gas to when the precursor is supplying, and reacting at low oxygen partial pressure to form ruthenium film with low oxygen contamination |
| 08/01/2002 | US20020102812 Method for improving alignment precision in forming color filter array |
| 08/01/2002 | US20020102806 Method of producing a thin film resistor in an integrated circuit |
| 08/01/2002 | US20020102789 Semiconductor device and method in which contact hole is filled with silicon having low impurity concentration |
| 08/01/2002 | US20020102771 Semiconductor device and a method of manufacturing the same |
| 08/01/2002 | US20020102770 BGA semiconductor package improving solder joint reliability and fabrication method thereof |
| 08/01/2002 | US20020102769 Semiconductor device and fabrication method thereof |
| 08/01/2002 | US20020102768 Thickness of the insulation film between the second conducting film and the third conducing film in the region near the edge of the second conducting film is increased; large capacitance without lowering voltage resistance |
| 08/01/2002 | US20020102767 Ball grid array (BGA) to column grid array (CGA) conversion process |
| 08/01/2002 | US20020102765 Forming an electrical contact on an electronic component |
| 08/01/2002 | US20020102763 Stacked semiconductor device including improved lead frame arrangement |
| 08/01/2002 | US20020102755 Fuse for use in a semiconductor device, and semiconductor devices including the fuse |
| 08/01/2002 | US20020102496 Thin film circuit substrate and manufacturing method therefor |
| 08/01/2002 | US20020102429 Good flow and curing properties, reliability, do not pose hazard to human health or environment |
| 08/01/2002 | US20020102365 Adhesion of diffusion barrier and fluorinated silicon dioxide using hydrogen based preclean technology |
| 08/01/2002 | US20020102075 Optical connector and structure of optical connector-packaging/mounting portion |
| 08/01/2002 | US20020101891 Optical device module using integral heat transfer module |
| 08/01/2002 | US20020101755 Memory module |
| 08/01/2002 | US20020101723 Coaxial wiring within SOI semiconductor, PCB to system for high speed operation and signal quality |
| 08/01/2002 | US20020101720 Snap in heat sink shielding lid |
| 08/01/2002 | US20020101719 Thermally enhanced microcircuit package and method of forming same |
| 08/01/2002 | US20020101718 Liquid-cooled heat sink and manufacturing method thereof |
| 08/01/2002 | US20020101329 Integrated passive components and package with posts |
| 08/01/2002 | US20020101283 RF amplifier |
| 08/01/2002 | US20020100989 Electronic device package |
| 08/01/2002 | US20020100988 Semiconductor apparatus and a semiconductor device mounting method |
| 08/01/2002 | US20020100987 Semiconductor chip package and connection structure including a ground metal plane having blank patterns |
| 08/01/2002 | US20020100986 Electronic device |