Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
09/2002
09/10/2002US6448647 BGA package substrate
09/10/2002US6448646 Semiconductor device-mounting construction and inspection method therefor
09/10/2002US6448644 Flip chip assembly with via interconnection
09/10/2002US6448643 Three commonly housed diverse semiconductor dice
09/10/2002US6448642 Pressure-bonded heat-sink system
09/10/2002US6448641 Low-capacitance bonding pad for semiconductor device
09/10/2002US6448640 Ball array layout in chip assembly
09/10/2002US6448639 Substrate having specific pad distribution
09/10/2002US6448637 Hermetically sealed integrated circuit package incorporating pressure relief valve for equalizing interior and exterior pressures when placed in spaceborne environment
09/10/2002US6448636 Multi-layered integrated semiconductor device incorporating electrically connected integrated circuit chips and monitoring pads
09/10/2002US6448635 Surface acoustical wave flip chip
09/10/2002US6448634 Tape carrier, semiconductor assembly, semiconductor device and electronic instrument
09/10/2002US6448633 Semiconductor package and method of making using leadframe having lead locks to secure leads to encapsulant
09/10/2002US6448632 Metal coated markings on integrated circuit devices
09/10/2002US6448631 Cell architecture with local interconnect and method for making same
09/10/2002US6448630 Semiconductor device comprising a polish preventing pattern
09/10/2002US6448627 Antifuse strusture
09/10/2002US6448626 Semiconductor memory device having a plurality of laser fuses
09/10/2002US6448622 Germanium silicides and transistor layers
09/10/2002US6448619 Semiconductor device
09/10/2002US6448612 Pixel thin film transistor and a driver circuit for driving the pixel thin film transistor
09/10/2002US6448609 Method and system for providing a polysilicon stringer monitor
09/10/2002US6448591 Metallization line layout
09/10/2002US6448576 Programmable chalcogenide fuse within a semiconductor device
09/10/2002US6448575 Temperature control structure
09/10/2002US6448510 Substrate for electronic packaging, pin jig fixture
09/10/2002US6448506 Semiconductor package and circuit board for making the package
09/10/2002US6448504 Printed circuit board and semiconductor package using the same
09/10/2002US6448491 Electromagnetic interference suppressing body having low electromagnetic transparency and reflection, and electronic device having the same
09/10/2002US6448195 Composition for ceramic substrate and ceramic circuit component
09/10/2002US6448190 Method and apparatus for fabrication of integrated circuit by selective deposition of precursor liquid
09/10/2002US6448184 Formation of diamond particle interconnects
09/10/2002US6448178 Heating in an oxidizing atmosphere prevents dopants such as the phosphorous atoms from escaping from the thin film and increasing the resistance of the film
09/10/2002US6448177 Method of making a semiconductor device having a dual damascene interconnect spaced from a support structure
09/10/2002US6448174 Wiring method for producing a vertical, integrated circuit structure and vertical, integrated circuit structure
09/10/2002US6448173 Aluminum-based metallization exhibiting reduced electromigration and method therefor
09/10/2002US6448172 Manufacturing method of forming interconnection in semiconductor device
09/10/2002US6448168 Method for distributing a clock on the silicon backside of an integrated circuit
09/10/2002US6448153 Thinning and dicing of semiconductor wafers using dry etch, and obtaining semiconductor chips with rounded bottom edges and corners
09/10/2002US6448147 Semiconductor device and method for manufacturing the same
09/10/2002US6448132 Semiconductor device having a lower electrode aperture that is larger than the photolithography resolution of the capacitor pattern
09/10/2002US6448113 Method of forming fuse area structure including protection film on sidewall of fuse opening in semiconductor device
09/10/2002US6448111 Method of manufacturing a semiconductor device
09/10/2002US6448110 Method for fabricating a dual-chip package and package formed
09/10/2002US6448108 Method of making a semiconductor chip assembly with a conductive trace subtractively formed before and after chip attachment
09/10/2002US6448107 Pin indicator for leadless leadframe packages
09/10/2002US6448106 Modules with pins and methods for making modules with pins
09/10/2002US6448098 Detection of undesired connection between conductive structures within multiple layers on a semiconductor wafer
09/10/2002US6447923 Layer of high bonding strength on the surface of a highly heat conductive, mechanically strong si3n4 ceramic; metallizing layer containing 0.01 to 20% silicon
09/10/2002US6447894 Silicon carbide composite, method for producing it and heat dissipation device employing it
09/10/2002US6447888 Ceramic wiring board
09/10/2002US6447688 Method for fabricating a stencil mask
09/10/2002US6447634 Method and apparatus for selective removal of material from wafer alignment marks
09/10/2002US6447321 Socket for coupling an integrated circuit package to a printed circuit board
09/10/2002US6446874 Method of fabricating an electronic module or label, module or label obtained and medium including a module or label of this kind
09/10/2002US6446873 Method of forming a via overlap
09/10/2002US6446709 Combination heat radiator
09/10/2002US6446708 Heat dissipating device
09/10/2002US6446707 Active heat sink structure with directed air flow
09/10/2002US6446641 Method of manufacturing semiconductor device, and semiconductor device manufactured thereby
09/10/2002US6446335 Direct thermal compression bonding through a multiconductor base layer
09/10/2002US6446334 Heat transfer material for an improved die edge contacting socket
09/10/2002US6446317 Hybrid capacitor and method of fabrication therefor
09/06/2002WO2002069684A2 Pin grid array socket with reinforcement plate
09/06/2002WO2002069680A2 Adapter for plastic-leaded chip carrier (plcc) and other surface mount technology (smt) chip carriers
09/06/2002WO2002069494A2 Integrated circuit comprising an energy storage capacitor
09/06/2002WO2002069454A1 A shielded carrier with components for land grid array connectors
09/06/2002WO2002069440A1 Coupling device using buried capacitors in multilayered substrate
09/06/2002WO2002069404A2 Circuit arrangement
09/06/2002WO2002069403A1 Arrangement and method for impedance matching
09/06/2002WO2002069402A1 Semiconductor device and its manufacturing method
09/06/2002WO2002069401A1 Semiconductor device, its manufacturing method, and electronic apparatus
09/06/2002WO2002069400A1 Plastic semiconductor package
09/06/2002WO2002069399A1 Super-thin high speed flip chip package
09/06/2002WO2002069398A2 Encapsulated die package with improved parasitic and thermal performance
09/06/2002WO2002069397A2 Semiconductor die package having mesh power and ground planes
09/06/2002WO2002069389A2 Semiconductor wafer with process control modules
09/06/2002WO2002069388A1 Electrical apparatus and method of manufacturing electrical apparatus
09/06/2002WO2002069386A1 Semiconductor chip and production method for a housing
09/06/2002WO2002069384A1 Chip scale package with flip chip interconnect
09/06/2002WO2002069382A1 Solid-state device and its manufacturing method
09/06/2002WO2002069380A2 Atomically thin highly resistive barrier layer in a copper via
09/06/2002WO2002069374A2 Tape ball grid array semiconductor package structure and assembly process
09/06/2002WO2002069373A2 Gallium nitride material based semiconductor devices including thermally conductive regions
09/06/2002WO2002069372A2 Self-coplanarity bumping shape for flip chip
09/06/2002WO2002069368A2 Multiple material stacks with a stress relief layer between a metal structure and a passivation layer and method
09/06/2002WO2002069251A1 Memory card and its manufacturing method
09/06/2002WO2002068321A2 Forming tool for forming a contoured microelectronic spring mold
09/06/2002WO2002068320A2 Devices having substrates with openings passing through the substrates and conductors in the openings, and methods of manufacture
09/06/2002WO2002068318A1 Heat transport device
09/06/2002WO2002054487A3 Socket and package power/ground bar apparatus that increases current carrying capacity resulting in higher ic power delivery
09/06/2002WO2002025704A3 Leadframe-based module dc bus design to reduce module inductance
09/06/2002WO2002025703A3 Substrate-level dc bus design to reduce module inductance
09/06/2002WO2002023632B1 Contact device and circuit
09/06/2002WO2002017698A3 Distributed thermal management system for electronic components
09/06/2002WO2001037322A9 System and method for product yield prediction using a logic characterization vehicle
09/06/2002WO2001026150A9 System and method for repairing interconnect links
09/05/2002US20020123872 Method and apparatus for simulating manufacturing, electrical and physical characteristics of a semiconductor device
09/05/2002US20020123317 Radio frequency module
09/05/2002US20020123247 Control of Vmin transient voltage drift by maintaining a temperature less than or equal to 350°C after the protective overcoat level