| Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155) |
|---|
| 09/17/2002 | US6452797 Fan-cooled card |
| 09/17/2002 | US6452781 Multilayer electronic device |
| 09/17/2002 | US6452779 One-mask metal-insulator-metal capacitor and method for forming same |
| 09/17/2002 | US6452778 Parasitic insensitive capacitor in d/a converter |
| 09/17/2002 | US6452768 Circuit arrangement for protecting integrated circuits against electrostatic discharges |
| 09/17/2002 | US6452478 Voltage trimmable resistor |
| 09/17/2002 | US6452439 Inductive voltage spike generator with diode shunt |
| 09/17/2002 | US6452412 Drop-in test structure and methodology for characterizing an integrated circuit process flow and topography |
| 09/17/2002 | US6452406 Probe structure having a plurality of discrete insulated probe tips |
| 09/17/2002 | US6452311 Piezoelectric device, manufacturing method therefor, and method for manufacturing piezoelectric oscillator |
| 09/17/2002 | US6452285 Fabrication of standard defects in contacts |
| 09/17/2002 | US6452284 Semiconductor device substrate and a process for altering a semiconductor device |
| 09/17/2002 | US6452283 Semiconductor chip with surface cover |
| 09/17/2002 | US6452282 Insulating adhesive tape for a semiconductor chip package having a copper lead frame |
| 09/17/2002 | US6452281 Semiconductor integrated circuit and fabrication process therefor |
| 09/17/2002 | US6452279 Semiconductor device |
| 09/17/2002 | US6452278 Low profile package for plural semiconductor dies |
| 09/17/2002 | US6452277 Semiconductor device and manufacturing method thereof |
| 09/17/2002 | US6452276 Ultra thin, single phase, diffusion barrier for metal conductors |
| 09/17/2002 | US6452274 Semiconductor device having a low dielectric layer as an interlayer insulating layer |
| 09/17/2002 | US6452273 Semiconductor integrated circuit device and method of manufacturing the same |
| 09/17/2002 | US6452272 Semiconductor device |
| 09/17/2002 | US6452271 Conductive barrier layer for use on bond pads of integrated circuit dies that will not oxidize to form a nonconductive material; good electrical and thermal conductivity; low thermal expansion |
| 09/17/2002 | US6452270 Semiconductor device having bump electrode |
| 09/17/2002 | US6452269 Semiconductor integrated circuit having power supply pin |
| 09/17/2002 | US6452268 Integrated circuit package configuration having an encapsulating body with a flanged portion and an encapsulating mold for molding the encapsulating body |
| 09/17/2002 | US6452267 Selective flip chip underfill processing for high speed signal isolation |
| 09/17/2002 | US6452266 Semiconductor device |
| 09/17/2002 | US6452265 Multi-chip module utilizing a nonconductive material surrounding the chips that has a similar coefficient of thermal expansion |
| 09/17/2002 | US6452264 Insulating thick film composition, ceramic electronic device using the same, and electronic apparatus |
| 09/17/2002 | US6452263 Radiation shield and radiation shielded integrated circuit device |
| 09/17/2002 | US6452262 Layout of Vdd and Vss balls in a four layer PBGA |
| 09/17/2002 | US6452258 Protective coating of palladium alloy and wirebondable and solderable material such as gold, silver or palladium; lower cost |
| 09/17/2002 | US6452257 Film carrier tape |
| 09/17/2002 | US6452256 Semiconductor device |
| 09/17/2002 | US6452255 Low inductance leadless package |
| 09/17/2002 | US6452254 Optical package with dual interconnect capability |
| 09/17/2002 | US6452253 Method and apparatus for magnetic shielding of an integrated circuit |
| 09/17/2002 | US6452251 Damascene metal capacitor |
| 09/17/2002 | US6452250 Stacked integrated circuit and capacitor structure containing via structures |
| 09/17/2002 | US6452249 Inductor with patterned ground shield |
| 09/17/2002 | US6452248 Low-powered, self-timed, one-time in-circuit programmable MOS fuse element and circuit |
| 09/17/2002 | US6452247 Inductor for integrated circuit |
| 09/17/2002 | US6452238 MEMS wafer level package |
| 09/17/2002 | US6452235 Floating body ESD protection circuit |
| 09/17/2002 | US6452209 Semiconductor devices having backside probing capability |
| 09/17/2002 | US6452208 Semiconductor chip including a reference element having reference coordinates |
| 09/17/2002 | US6452117 Method for filling high aspect ratio via holes in electronic substrates and the resulting holes |
| 09/17/2002 | US6452115 Circuit pattern for multi-layer circuit board for mounting electronic parts |
| 09/17/2002 | US6452113 Apparatus for providing power to a microprocessor with integrated thermal and EMI management |
| 09/17/2002 | US6452111 Adhesives and adhesive films |
| 09/17/2002 | US6452110 Patterning microelectronic features without using photoresists |
| 09/17/2002 | US6451879 Phenolic resin, epoxy resin, and processes for producing these |
| 09/17/2002 | US6451878 Containing bisphenol s |
| 09/17/2002 | US6451712 Method for forming a porous dielectric material layer in a semiconductor device and device formed |
| 09/17/2002 | US6451710 Method of manufacturing multi-layer printed wiring board |
| 09/17/2002 | US6451709 Methodology of removing misplaced encapsulant for attachment of heat sinks in a chip on board package |
| 09/17/2002 | US6451689 Electroless plating of copper |
| 09/17/2002 | US6451688 Opening of a downwardly protruding window for a dual damascene structure |
| 09/17/2002 | US6451685 Method for multilevel copper interconnects for ultra large scale integration |
| 09/17/2002 | US6451684 Semiconductor device having a conductive layer side surface slope which is at least 90° and method for manufacturing the same |
| 09/17/2002 | US6451683 Damascene structure and method of making |
| 09/17/2002 | US6451682 Method of forming interconnect film |
| 09/17/2002 | US6451681 Method of forming copper interconnection utilizing aluminum capping film |
| 09/17/2002 | US6451669 Method of forming insulated metal interconnections in integrated circuits |
| 09/17/2002 | US6451659 In semiconductors |
| 09/17/2002 | US6451651 Method of manufacturing DRAM device invention |
| 09/17/2002 | US6451634 Method of fabricating a multistack 3-dimensional high density semiconductor device |
| 09/17/2002 | US6451629 Leadframe alteration to direct compound flow into package |
| 09/17/2002 | US6451628 Method fabricating a semiconductor device with a decreased mounting area |
| 09/17/2002 | US6451627 Semiconductor device and process for manufacturing and packaging a semiconductor device |
| 09/17/2002 | US6451448 Surface treated metallic materials and manufacturing method thereof |
| 09/17/2002 | US6451422 Thermoconductive composition that includes rubber, phase change material and thermally conductive filler |
| 09/17/2002 | US6451418 Heat conductive resin substrate and semiconductor package |
| 09/17/2002 | US6451127 Conductive paste and semiconductor component having conductive bumps made from the conductive paste |
| 09/17/2002 | US6450844 Socket assembly for a pin grid-array package and terminals therefor |
| 09/17/2002 | US6450839 Socket, circuit board, and sub-circuit board for semiconductor integrated circuit device |
| 09/17/2002 | US6450699 Photonic and electronic components on a shared substrate |
| 09/17/2002 | US6450251 Heat removal system |
| 09/17/2002 | US6450250 Stackable heat sink for electronic components |
| 09/17/2002 | US6450249 Heat sink fastening device |
| 09/17/2002 | US6450248 Heat sink retainer |
| 09/17/2002 | US6449838 Method of mounting a semiconductor device to a substrate |
| 09/17/2002 | US6449817 Equipment for securing a heat dissipator of CPU |
| 09/12/2002 | WO2002071822A1 Heatsink and heatsink device using the heatsink |
| 09/12/2002 | WO2002071547A1 Module and electronic device |
| 09/12/2002 | WO2002071486A2 Mixed analog and digital integrated circuits |
| 09/12/2002 | WO2002071483A2 Conductor track arrangement and method for producing a conductor track arrangement |
| 09/12/2002 | WO2002071482A2 Hollow structure in an integrated circuit and method for producing such a hollow structure in an integrated circuit |
| 09/12/2002 | WO2002071481A1 Enhanced leadless chip carrier |
| 09/12/2002 | WO2002071480A2 Electronic package with improved cap design for reduced interfacial stresses |
| 09/12/2002 | WO2002071479A1 Heat dissipation device |
| 09/12/2002 | WO2002071473A1 Film thichness measuring monitor wafer |
| 09/12/2002 | WO2002071472A2 Method and structure of in-situ wafer scale polymer stud grid array contact formation |
| 09/12/2002 | WO2002071471A2 Traceless flip chip assembly & method |
| 09/12/2002 | WO2002071468A1 HYBRID LOW-k INTERCONNECT STRUCTURE COMPRISED OF 2 SPIN-ON DIELECTRIC MATERIALS |
| 09/12/2002 | WO2002071467A1 Low-k interconnect structure comprised of a multilayer of spin-on porous dielectrics |
| 09/12/2002 | WO2002071456A2 Magnetic layer processing |
| 09/12/2002 | WO2002071447A2 Ruthenium silicide wet etch |
| 09/12/2002 | WO2002071137A1 Display device |