Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 23 - Details of semiconductor or other solid state devices
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
10/2002
10/15/2002US6465875 Semiconductor device package with plural pad lead frame
10/15/2002US6465872 Semiconductor device
10/15/2002US6465868 Integrated circuit having capacitive elements
10/15/2002US6465867 Amorphous and gradated barrier layer for integrated circuit interconnects
10/15/2002US6465854 Micromechanical component
10/15/2002US6465850 Semiconductor device
10/15/2002US6465832 Semiconductor device
10/15/2002US6465827 Resin-encapsulated semiconductor apparatus and process for its fabrication
10/15/2002US6465822 Semiconductor device having a reduced-capacitance conductive layer and fabrication method for the same
10/15/2002US6465806 Semiconductor device, display device, and method for producing a semiconductor device
10/15/2002US6465747 Microelectronic assemblies having solder-wettable pads and conductive elements
10/15/2002US6465745 Micro-BGA beam lead connection
10/15/2002US6465744 Graded metallic leads for connection to microelectronic elements
10/15/2002US6465743 Multi-strand substrate for ball-grid array assemblies and method
10/15/2002US6465734 Resin sealed semiconductor device, circuit member for use therein and method of manufacturing circuit member
10/15/2002US6465729 Surface trace electrical feedthru for conducting electricity across a pressure envelope
10/15/2002US6465728 Spring clip for electronic device and heat sink assembly
10/15/2002US6465376 Method and structure for improving electromigration of chip interconnects
10/15/2002US6465367 Lossless co-planar wave guide in CMOS process
10/15/2002US6465366 Dual frequency plasma enhanced chemical vapor deposition of silicon carbide layers
10/15/2002US6465347 Tungsten film forming method
10/15/2002US6465341 Manufacturing method for semiconductor interconnect barrier of boron silicon nitride
10/15/2002US6465339 Technique for intralevel capacitive isolation of interconnect paths
10/15/2002US6465337 Methods of fabricating integrated circuit bonding pads including intermediate closed conductive layers having spaced apart insulating islands therein
10/15/2002US6465336 Circuit and method for providing interconnections among individual integrated circuit chips in a multi-chip module
10/15/2002US6465331 DRAM fabricated on a silicon-on-insulator (SOI) substrate having bi-level digit lines
10/15/2002US6465322 Semiconductor processing methods and structures for determining alignment during semiconductor wafer processing
10/15/2002US6465320 Electronic component and method of manufacturing
10/15/2002US6465305 Methods and circuits employing threshold voltages for mask-alignment detection
10/15/2002US6465294 Self-aligned process for a stacked gate RF MOSFET device
10/15/2002US6465282 Method of forming a self-aligned antifuse link
10/15/2002US6465281 Method of manufacturing a semiconductor wafer level package
10/15/2002US6465280 In-situ cap and method of fabricating same for an integrated circuit device
10/15/2002US6465279 Lead frame and production method thereof, and semiconductor device and fabrication method thereof
10/15/2002US6465278 Method and apparatus for delivering electrical power to a semiconductor die
10/15/2002US6465276 Power semiconductor package and method for making the same
10/15/2002US6465274 Lead frame tooling design for bleed barrier groove
10/15/2002US6465273 Method of making ZnSe based light emitting device with in layer using vibration and pressure
10/15/2002US6465112 Method for fabricating semiconductor device
10/15/2002US6465085 Thin film wiring board and method for manufacturing the same, base substrate and method for manufacturing the same
10/15/2002US6465082 Stress relaxation electronic part, stress relaxation wiring board, and stress relaxation electronic part mounted body
10/15/2002US6464123 Bondhead lead clamp apparatus and method
10/10/2002WO2002080644A1 A substrate for mounting a semiconductor
10/10/2002WO2002080640A2 Shunt power connection for an integrated circuit package
10/10/2002WO2002080638A1 Encapsulation arrangement
10/10/2002WO2002080634A1 High-frequency module
10/10/2002WO2002080309A1 High density packaging of electronic components
10/10/2002WO2002080280A1 Methods of fabricating nanostructures and nanowires and devices fabricated therefrom
10/10/2002WO2002080279A1 Three-dimensional metal devices highly suspended above semiconductor substrate, their circuit model, and method for manufacturing the same
10/10/2002WO2002080273A2 Alternate bump metallurgy bars for power and ground routing
10/10/2002WO2002080272A2 Insulated bond wire assembly process technology for integrated circuits
10/10/2002WO2002080271A2 Fluxless flip chip interconnection
10/10/2002WO2002080270A1 Cooling apparatus having low profile extrusion
10/10/2002WO2002080269A2 Method and structure for ex-situ polymer stud grid array contact formation
10/10/2002WO2002080268A1 A substrate for mounting a semiconductor chip
10/10/2002WO2002080260A1 Deposition method, deposition apparatus, insulating film and semiconductor integrated circuit
10/10/2002WO2002080259A1 Film forming method and film forming device
10/10/2002WO2002080258A1 Integrated circuit structure
10/10/2002WO2002080257A1 Film forming method and film forming device
10/10/2002WO2002080255A1 Electrostatically actuated micro-electro-mechanical devices and method of manufacture
10/10/2002WO2002080229A2 Microelectronic assembly with die support and method
10/10/2002WO2002080228A2 Structure including cubic boron nitride films
10/10/2002WO2002080226A2 Bonding pad for flip-chip fabrication
10/10/2002WO2002080205A1 Composite electronic components
10/10/2002WO2002079537A2 W-cvd with fluorine-free tungsten nucleation
10/10/2002WO2002079294A1 One-component hot-setting epoxy resin composition and semiconductor mounting underfill material
10/10/2002WO2002079114A1 Composition for insulating ceramics and insulating ceramics using the same
10/10/2002WO2002078896A1 Methods and systems for processing a device, methods and systems for modeling same and the device
10/10/2002WO2002078895A1 High-speed, precision, laser-based method and system
10/10/2002WO2002078781A2 Method and apparatus for providing hermetic electrical feedthrough
10/10/2002WO2002063683A3 Method of manufacturing a semiconductor device and a semiconductor device obtained by means of said method
10/10/2002WO2002054451A3 Method for stacking integrated circuits
10/10/2002WO2002042240A3 A heat conductive material
10/10/2002WO2002025825A3 Method for assembling components and antennae in radio frequency identification devices
10/10/2002WO2002017388A3 Method of improving the adhesion of copper
10/10/2002WO2002011206A3 Electronic assembly comprising interposer with embedded capacitors and methods of manufacture
10/10/2002WO2001001455A3 Chip with protruding microelectrodes and method for the production thereof
10/10/2002US20020147564 Digital temperature sensor (DTS) system to monitor temperature in a memory subsystem
10/10/2002US20020147478 Method for manufacturing hybrid electronic circuits for active implantable medical devices
10/10/2002US20020147264 Embedding resin
10/10/2002US20020147263 Electronics embedded in dielectric
10/10/2002US20020146944 Terminal for electrical connector and terminal material with a carrier
10/10/2002US20020146901 Semiconductor devices and methods for manufacturing semiconductor devices
10/10/2002US20020146900 Recessed thin film landing pad structure
10/10/2002US20020146899 Method of forming metal contact in semiconductor device
10/10/2002US20020146898 Bonding pad, semiconductor device and wire bonding method
10/10/2002US20020146897 Structure having reduced lateral spacer erosion
10/10/2002US20020146889 Process for implanting a deep subcollector with self-aligned photo registration marks
10/10/2002US20020146864 Semiconductor device and method of manufacturing the same
10/10/2002US20020146862 Device and method for stacking wire-bonded integrated circuit dice on flip-chip bonded integrated circuit dice
10/10/2002US20020146646 Providing wafer that has contact pads exposed by a passivation layer formed on surface of wafer; forming a first mask film having a openings; filling solder material in openings; reflowing solder material into solder posts
10/10/2002US20020146565 Curability, moldability and mass productivity, reliability
10/10/2002US20020145901 Novel transmission lines for CMOS integrated circuits
10/10/2002US20020145854 Composite heat-dissipating structure
10/10/2002US20020145728 Method and apparatus for a spectrally stable light source using white light LEDs
10/10/2002US20020145442 Test circuit, semiconductor product wafer having the test circuit, and method of monitoring manufacturing process using the test circuit
10/10/2002US20020145440 Semiconductor device
10/10/2002US20020145208 Transfer mold semiconductor packaging processes, circuit substrates, semiconductor packages, and ball grid arrays
10/10/2002US20020145207 Method and structure for integrated circuit package
10/10/2002US20020145206 Bonding pad structures for semiconductor devices and fabrication methods thereof
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