Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
10/2002
10/24/2002US20020157082 Inter-dice wafer level signal transfer methods for integrated circuits
10/24/2002US20020157076 Fabrication method for a semiconductor device with dummy patterns
10/24/2002US20020156538 Data processing system and associated control chip and printed circuit board
10/24/2002US20020156189 Epoxy resin composition and curing product therof
10/24/2002US20020155744 Electrical connector
10/24/2002US20020155743 PGA socket and contact
10/24/2002US20020155728 Incorporating flexible, sheet-like elements having terminals thereon overlying the front or rear face of the chip, which are movable to compensate for thermal expansion, to provide a compact unit.
10/24/2002US20020155722 Method for bottomless deposition of barrier layers in integrated circuit metallization schemes
10/24/2002US20020155719 Semiconductor device and manufacturing method thereof
10/24/2002US20020155702 Manufacturing method of semiconductor device
10/24/2002US20020155695 Dual damascene process using an oxide liner for a dielectric barrier layer
10/24/2002US20020155680 Method for reducing plasma damage to a gate oxide of a metal-oxide semiconductor wafer
10/24/2002US20020155678 Method for fabricating an integrated circuit, in particular an antifuse
10/24/2002US20020155677 Electronic device with interleaved portions for use in integrated circuits
10/24/2002US20020155672 Method of forming metal fuse
10/24/2002US20020155655 Electromagnetic interference; forming channel; filling with electroconductive material; coupling to guard ring
10/24/2002US20020155642 Semiconductor die package including carrier with mask
10/24/2002US20020155640 Semiconductor package with heat-dissipating structure and method of making the same
10/24/2002US20020155639 Preferential etching of semiconductor structure using gaseous mixture of nirogen and hydrogen
10/24/2002US20020155638 Method for fabricating semiconductor device
10/24/2002US20020155637 Flip chip interconnected structure and a fabrication method thereof
10/24/2002US20020155286 Adhesive composition and adhesive sheet for semiconductor devices
10/24/2002US20020155264 Monolithic ceramic sunstrate, manufacturing and designing methods therefor, and electronic device
10/24/2002US20020155263 Method for forming interconnect structure with low dielectric constant
10/24/2002US20020155261 Method for forming interconnect structure with low dielectric constant
10/24/2002US20020155219 From titanium chloride and ammonia; aftertreatment with hydrogen gas
10/24/2002US20020154872 Protective member and optical module
10/24/2002US20020154485 Multi-layer structure and method for forming a thermal interface with low contact resistance between a microelectronic component package and heat sink
10/24/2002US20020154483 Computer system having removable processor and modular thermal unit
10/24/2002US20020154482 Press - contact type semiconductor device
10/24/2002US20020154462 Double-triggered electrostatic discharge protection circuit
10/24/2002US20020154379 Electrochromic rearview mirror assembly incorporating a display/signal light
10/24/2002US20020154366 Infrared data communication module and method of making the same
10/24/2002US20020153977 Apparatus and method for angled coaxial to planar structure broadband transition
10/24/2002US20020153916 Method of identifying and analyzing semiconductor chip defects
10/24/2002US20020153620 Semiconductor wafer edge marking
10/24/2002US20020153619 Semiconductor chip having pads with plural junctions for different assembly methods
10/24/2002US20020153618 Semiconductor device
10/24/2002US20020153617 Flip chip interconnected structure and a fabrication method thereof
10/24/2002US20020153616 High-frequency semiconductor device
10/24/2002US20020153609 Semiconductor circuit device having gate array area and method of making thereof
10/24/2002US20020153608 Land grid array semiconductor device and method of mounting land grid array semiconductor devices
10/24/2002US20020153606 Integrated circuit packages assembled utilizing fluidic self-assembly
10/24/2002US20020153605 Packaging structure for ball grid array
10/24/2002US20020153604 Die support structure
10/24/2002US20020153603 System of a package fabricated on a semiconductor or dielectric wafer
10/24/2002US20020153602 Ball grid array chip packages having improved testing and stacking characteristics
10/24/2002US20020153601 Multi-chip package
10/24/2002US20020153600 Double sided chip package
10/24/2002US20020153599 Multi-chip package
10/24/2002US20020153597 Fine pitch lead frame lead and method
10/24/2002US20020153596 Lead frame and semiconductor package formed using it
10/24/2002US20020153593 Bypass circuits for reducing plasma damage
10/24/2002US20020153590 High-speed stacked capacitor in SOI structure
10/24/2002US20020153589 Contact structure with a lower interconnection having t-shaped portion in cross section and method for forming the same
10/24/2002US20020153588 Semiconductor device provided with fuse and method of disconnecting fuse
10/24/2002US20020153585 Semiconductor switching device
10/24/2002US20020153582 High-frequency module and method for manufacturing the same
10/24/2002US20020153576 Semiconductor device
10/24/2002US20020153571 Electrostatic discharge protection structures having high holding current for latch-up immunity
10/24/2002US20020153570 Two-stage ESD protection circuit with a secondary ESD protection circuit having a quicker trigger-on rate
10/24/2002US20020153551 Method for making a metal-insulator-metal capacitor using plate-through mask techniques
10/24/2002US20020153548 Semiconductor device and method of manufacturing the same
10/24/2002US20020153541 Cluster globular semiconductor device
10/24/2002US20020153539 Semiconductor integrated circuit device and method of manufacturing the same
10/24/2002US20020153538 Integrated circuit element, printed circuit board and electronic device having input/output terminals for testing and operation
10/24/2002US20020153257 Preparing active part comprising wafer provided with conductive connection pads on one face and the base being provided with conductive pins, electrolytic deposition of conductive metal on the pin; oxidation, nitrizing
10/24/2002US20020153256 Method and apparatus for depositing and controlling the texture of a thin film
10/24/2002US20020153166 Conductive pads layout for BGA packaging structure
10/24/2002US20020153154 Underfill coating for LOC package
10/24/2002US20020152955 Apparatus and method for depositing an electroless solution
10/24/2002US20020152926 Immersing the substrate in a copper plating bath; immersing an activator in copper plating bath; performing a direct contact between activator and substrate to deposit copper on substrate
10/24/2002US20020152761 Spray cooling with local control of nozzles
10/24/2002US20020152610 Electronic circuit device and method of production of the same
10/24/2002EP1145612A3 Method for mounting an electronic component
10/24/2002DE10216019A1 Container used for a semiconductor sensor comprises a housing part provided with a housing hollow space for a sensor element, a lid for closing the hollow space, and connecting lines
10/24/2002DE10216017A1 Semiconductor component used e.g. as an integrated circuit of a vehicle comprises a polysilicon resistor, and metal conductors each electrically connected to the resistor at each end via contacts
10/24/2002DE10163361A1 Halbleitervorrichtung Semiconductor device
10/24/2002DE10157887A1 Basisverbindungssubstrat, Herstellungsverfahren davon, Halbleiteranordnung und Herstellungsverfahren davon Based compound substrate, manufacturing method thereof, semiconductor device and manufacturing method thereof
10/24/2002DE10135812C1 Integrated semiconductor circuit for memory module has signal input points coupled via programmable switches to internal function elements
10/24/2002DE10130592C1 Module component used for storage modules for data processing comprises a main module and sub-modules
10/24/2002DE10120685C1 Encapsulated organic-electronic circuit has electronic components especially made of organic material and arranged between at least two layers forming barrier
10/24/2002DE10118402A1 Contact chain total resistance measurement method for testing semiconductor chips, involves measuring voltage and current in probe pads to obtain total resistance, by selectively connecting n-type doped layers to substrate
10/24/2002DE10118384A1 Anordnung zur Kühlung eines Leistungs-Halbleiterelementes Arrangement for cooling a power semiconductor element
10/24/2002DE10114897A1 Elektronisches Bauteil Electronic component
10/23/2002EP1251561A2 Semiconductor switching device
10/23/2002EP1251560A1 Cluster globular semiconductor device
10/23/2002EP1251558A2 Semiconductor device
10/23/2002EP1251557A2 Method of manufacturing semiconductor devices and semiconductor device
10/23/2002EP1251546A2 Electronic device sealed under vacuum containing a getter and method of operation
10/23/2002EP1250717A2 Ldmos power package with a plurality of ground signal paths
10/23/2002EP1250715A1 Method of fabricating copper interconnections in semiconductor devices
10/23/2002EP1250713A1 System and method for contacting switching circuits
10/23/2002EP1250709A1 Electronic package with integrated capacitor
10/23/2002EP1208607A4 Passivation of gan based fets
10/23/2002EP1183642B1 Integrated circuit device which is secured against attacks resulting from controlled destruction of an additional layer
10/23/2002EP1105545B1 Preparation of metal-matrix composite materials with high particulate loadings by concentration
10/23/2002EP0946646B1 Thermosetting encapsulants for electronics packaging
10/23/2002EP0944671B1 Thermally reworkable binders for flip-chip devices
10/23/2002EP0806063B1 Array of leads assembled with electric components and corresponding method of assembling