Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
02/2003
02/18/2003US6521979 Member for semiconductor package and semiconductor package using the same, and fabrication method thereof
02/18/2003US6521978 Shielding device and electrical structural part having a shielding device
02/18/2003US6521975 Scribe street seals in semiconductor devices and method of fabrication
02/18/2003US6521972 Microstrip line; semiconductors
02/18/2003US6521971 Metal fuse in copper dual damascene
02/18/2003US6521970 Chip scale package with compliant leads
02/18/2003US6521947 Method of integrating substrate contact on SOI wafers with STI process
02/18/2003US6521933 Semiconductor device and method of manufacturing the same
02/18/2003US6521932 Semiconductor device with copper wiring connected to storage capacitor
02/18/2003US6521927 Semiconductor device and method for the manufacture thereof
02/18/2003US6521923 Microwave field effect transistor structure on silicon carbide substrate
02/18/2003US6521919 Semiconductor device of reduced thermal resistance and increased operating area
02/18/2003US6521916 Radiation emitter device having an encapsulant with different zones of thermal conductivity
02/18/2003US6521910 Structure of a test key for monitoring salicide residue
02/18/2003US6521900 Alignment marks for charged-particle-beam microlithography, and alignment methods using same
02/18/2003US6521881 Stacked structure of an image sensor and method for manufacturing the same
02/18/2003US6521846 Method for assigning power and ground pins in array packages to enhance next level routing
02/18/2003US6521823 Solar cell and method of fabricating the same
02/18/2003US6521546 Forming hardmask by applying electric field to fluoro-organosilane and oxidizing gas
02/18/2003US6521533 Method for producing a copper connection
02/18/2003US6521532 Method for making integrated circuit including interconnects with enhanced electromigration resistance
02/18/2003US6521531 Method for selectively growing a conductive film to fill a contact hole
02/18/2003US6521530 Composite interposer and method for producing a composite interposer
02/18/2003US6521528 Semiconductor device and method of making thereof
02/18/2003US6521521 Bonding pad structure and method for fabricating the same
02/18/2003US6521516 Process for local on-chip cooling of semiconductor devices using buried microchannels
02/18/2003US6521485 Method for manufacturing wafer level chip size package
02/18/2003US6521483 Semiconductor device, method of manufacture thereof, circuit board, and electronic device
02/18/2003US6521482 Manufacturing method for a semiconductor device
02/18/2003US6521480 Method for making a semiconductor chip package
02/18/2003US6521478 Method for manufacturing a low-profile semiconductor device
02/18/2003US6521468 Lead formation, assembly strip test and singulation method
02/18/2003US6521358 Lead frame for semiconductor device and method of producing same
02/18/2003US6521354 Epoxy resin composition and semiconductor device
02/18/2003US6521138 Method for measuring width of bottom under cut during etching process
02/18/2003US6521069 Green sheet and manufacturing method thereof, manufacturing method of multi-layer wiring board, and manufacturing method of double-sided wiring board
02/18/2003US6520778 Microelectronic contact structures, and methods of making same
02/18/2003US6520476 Spindle positioning support structure
02/18/2003US6520250 Fan holder
02/18/2003US6520248 Heat sink having bonded cooling fins
02/18/2003US6519963 Semiconductor equipment and refrigerator
02/18/2003US6519955 Pumped liquid cooling system using a phase change refrigerant
02/18/2003US6519846 Chip size package and method of fabricating the same
02/18/2003US6519845 Wire bonding to dual metal covered pad surfaces
02/18/2003US6519844 Providing a substrate having an upper surface and an air space above the upper surface; forming a plurality of electrically conductive vias through the upper surface of the substrate and extending at least partially through the substrate;joining an
02/18/2003US6519843 Method of forming a chip carrier by joining a laminate layer and stiffener
02/18/2003US6519842 Method for mounting semiconductor device
02/18/2003US6519841 Method of IC packing/unpacking for preserving and updating data within the IC and the structure thereof
02/18/2003US6519822 An enclosed frame on a baseplate. A chip is provided to be fitted within the frame, forming a first given space between the chip and the baseplate and forming a second given space between the chip and the frame. The first given space is
02/13/2003WO2003013200A1 Circuit module
02/13/2003WO2003012879A1 Semiconductor device with inductive component and method of making
02/13/2003WO2003012870A1 Semiconductor device
02/13/2003WO2003012868A1 Semiconductor device and its manufacturing method
02/13/2003WO2003012867A2 Emi shielding for electronic packages
02/13/2003WO2003012866A1 Device for cooling housings, areas, components, media and the like
02/13/2003WO2003012865A2 Cooling apparatus
02/13/2003WO2003012864A1 Electronic assembly including a die having an integrated circu it and a layer of diamond and methods of producing the same
02/13/2003WO2003012863A1 Semiconductor device and its manufacturing method
02/13/2003WO2003012860A2 Boron-doped titanium nitride layer for high aspect ratio semiconductor devices
02/13/2003WO2003012857A1 Testing vias and contacts in integrated circuit fabrication
02/13/2003WO2003012856A2 Method for hermetically encapsulating a component
02/13/2003WO2003012841A2 Semiconductor structures and devices not lattice matched to the substrate
02/13/2003WO2003012802A1 Method for producing nanocomposite magnet using atomizing method
02/13/2003WO2003012547A1 Composition having permitivity being radiation-sensitively changeable and method for forming permitivity pattern
02/13/2003WO2002082389A3 Extraction of a private datum to authenticate an integrated circuit
02/13/2003WO2002081187A3 Anisotropic thermal solution
02/13/2003WO2002065573A8 Solid electrolyte cell and production method thereof
02/13/2003WO2002054492A3 Circuit
02/13/2003WO2002054484A3 Metal ion diffusion barrier layers
02/13/2003WO2002050882A3 Copper alloys for interconnections having improved electromigration characteristics and methods of making same
02/13/2003WO2002047151A3 Method for making a semiconductor chip using an integrated rigidity layer
02/13/2003WO2002039463A9 Methods and system for attaching substrates using solder structures
02/13/2003US20030033101 Sequential unique marking
02/13/2003US20030032322 Semiconductor device-socket
02/13/2003US20030032307 Layering nitrided oxide on a silicon substrate
02/13/2003US20030032306 Method for low temperature chemical vapor deposition of low-k films using selected cyclosiloxane and ozone gases for semiconductor applications
02/13/2003US20030032282 Barrier layer deposition using HDP-CVD
02/13/2003US20030032280 Method for filling fine hole
02/13/2003US20030032277 Semiconductor device, method of manufacturing the same, circuit board and electronic instrument
02/13/2003US20030032276 Method of fabricating a wafer level package
02/13/2003US20030032275 Method of copper/copper surface bonding using a conducting polymer for application in IC chip bonding
02/13/2003US20030032274 Method for eliminating reaction between photoresist and OSG
02/13/2003US20030032264 Method of manufacturing semiconductor device having conductive thin films
02/13/2003US20030032263 Semiconductor wafer, semiconductor device, and method for manufacturing the same
02/13/2003US20030032256 Overlay shift correction for the deposition of epitaxial silicon layer and post-epitaxial silicon layers in a semiconductor device
02/13/2003US20030032254 Resistance variable device, analog memory device, and programmable memory cell
02/13/2003US20030032233 Method for manufacturing semiconductor integrated circuit device
02/13/2003US20030032218 Method of manufacturing a semiconductor device
02/13/2003US20030032216 Semiconductor device and manufacturing method thereof
02/13/2003US20030031867 Laminate of an insulating film layer having adhesive agent in the semi- cured state, coefficient of linear expansion in the film transverse direction at 50-200 degrees C. is 17-30 ppm/degrees c and tensile modulus of elasticity is 6-12 GPa
02/13/2003US20030031830 Printed circuit boards and printed circuit board based substrates structures with multiple core layers
02/13/2003US20030031807 Deposition of transition metal carbides
02/13/2003US20030031789 Organosiloxanes
02/13/2003US20030031074 One-time programmable memory using fuse/anti-fuse and vertically oriented fuse unit memory cells
02/13/2003US20030031058 Semiconductor device formed in a rectangle region on a semiconductor substrate including a voltage generating circuit
02/13/2003US20030031000 Electrical device allowing for increased device densities
02/13/2003US20030030999 High dielectric constant composite material and multilayer wiring board using the same
02/13/2003US20030030995 Printed circuit board for semiconductor memory device
02/13/2003US20030030986 Thermal connector for transferring heat between removable printed circuit boards
02/13/2003US20030030985 Laminated ceramic electroni component, production method therefor, and electronic device