Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
02/2003
02/25/2003US6525412 Semiconductor device having chip scale package
02/25/2003US6525411 Plurality of wires connecting pads with lead bars
02/25/2003US6525409 CCD mold package with improved heat radiation structure
02/25/2003US6525407 Integrated circuit package
02/25/2003US6525406 Half-etched die pad; plating layer of nickel, gold, copper, tin, or palladium or alloy
02/25/2003US6525405 Leadless semiconductor product packaging apparatus having a window lid and method for packaging
02/25/2003US6525404 Moisture corrosion inhibitor layer for Al-alloy metallization layers, particularly for electronic devices and corresponding manufacturing method
02/25/2003US6525402 Semiconductor wafer, method of manufacturing the same and semiconductor device
02/25/2003US6525399 Junctionless antifuses and systems containing junctionless antifuses
02/25/2003US6525398 Semiconductor device capable of preventing moisture-absorption of fuse area thereof
02/25/2003US6525397 Extended drain MOSFET for programming an integrated fuse element to high resistance in low voltage process technology
02/25/2003US6525385 Semiconductor device with inductance element
02/25/2003US6525372 P-N rectifying junction; quad arrangement
02/25/2003US6525359 Resin-encapsulated semiconductor apparatus and process for its fabrication
02/25/2003US6525354 FET circuit block with reduced self-heating
02/25/2003US6525318 Methods of inspecting integrated circuit substrates using electron beams
02/25/2003US6525275 High densification of solder pads; reduced wiring layers; mounting of flip chips
02/25/2003US6525160 Epoxy resin composition and process for producing silane-modified epoxy resin
02/25/2003US6524989 Tetraorganophosponium dicyclic tetraorganoborate catalyst
02/25/2003US6524972 Method for forming an interlayer insulating film, and semiconductor device
02/25/2003US6524962 Method for forming dual-damascene interconnect structure
02/25/2003US6524957 Method of forming in-situ electroplated oxide passivating film for corrosion inhibition
02/25/2003US6524953 Asymmetric, double-sided self-aligned silicide and method of forming the same
02/25/2003US6524942 Forming lower metal layer over predetermined area, forming dielectric layer over lower metal layer, etching partially the dielectric layer to form via openings, forming diffusion barrier, depositing metal overlays
02/25/2003US6524941 Sub-minimum wiring structure
02/25/2003US6524933 Methods of manufacturing semiconductor devices that protect interconnect wirings during processing of back substrate surface
02/25/2003US6524905 Semiconductor device, and thin film capacitor
02/25/2003US6524898 Method of fabricating a protective element in an SOI substrate
02/25/2003US6524892 Method of fabricating multilayer flexible wiring boards
02/25/2003US6524891 Method of pressure curing for reducing voids in a die attach bondline and applications thereof
02/25/2003US6524889 Method of transcribing a wiring pattern from an original substrate to a substrate with closely matched thermal expansion coefficients between both substrates for dimensional control of the transcribed pattern
02/25/2003US6524887 Embedded recess in polymer memory package and method of making same
02/25/2003US6524886 Method of making leadless semiconductor package
02/25/2003US6524885 Method, apparatus and system for building an interposer onto a semiconductor wafer using laser techniques
02/25/2003US6524881 Method and apparatus for marking a bare semiconductor die
02/25/2003US6524873 Continuous movement scans of test structures on semiconductor integrated circuits
02/25/2003US6524709 Epoxy resin compositions containing phosphorus, flame retardant resin sheet using said epoxy resin containing phosphorus, resin clad metal foil, prepreg and laminated board, multi layer board
02/25/2003US6524654 Method of controlling the spread of an adhesive on a circuitized organic substrate
02/25/2003US6524524 Method for making a heat dissipating tube
02/25/2003US6524517 Polymerization of hydrogel solution; solidification
02/25/2003US6524429 Method of forming buried wiring, and apparatus for processing substratum
02/25/2003US6524376 Anticorrosive agent
02/25/2003US6524352 Printed circuit boards
02/25/2003US6524346 High degree of precision; protective and alignment structures to a substrate
02/25/2003US6523446 Punching an adhesive tape comprising a base film and an adhesive layer provided on one or each side of the base film to mark the regions in the adhesive tape where contaminants or defects are contained; a method of producing an adhesive
02/25/2003US6523362 Support for components used in microsystems technology
02/25/2003US6523259 Method of manufacturing a heat pipe
02/20/2003WO2003015488A1 Electronics cooling subassembly
02/20/2003WO2003015485A1 Welded leadframe
02/20/2003WO2003015232A1 Active power/ground esd trigger
02/20/2003WO2003015169A1 Semiconductor device and ic card
02/20/2003WO2003015168A1 Optically and electrically programmable silicided polysilicon fuse device
02/20/2003WO2003015167A2 Semiconductor module
02/20/2003WO2003015166A2 Sheet for sealing electric wiring
02/20/2003WO2003015165A2 Electronic component with a plastic housing and method for production thereof
02/20/2003WO2003015164A2 Damping of high frequency bond wire vibration
02/20/2003WO2003015155A1 Method of manufacturing thin film sheet with bumps and thin film sheet with bumps
02/20/2003WO2003015146A1 Process and apparatus for treating a workpiece such as a semiconductor wafer
02/20/2003WO2003015110A1 Planar inductive component and a planar transformer
02/20/2003WO2003014633A2 Heat removal system
02/20/2003WO2003014210A1 Flame retardant molding compositions
02/20/2003WO2003013845A1 A high solids hbn slurry hbn paste spherical hbn powder, and methods of making and using them
02/20/2003WO2003001590A3 System and method to form a composite film stack utilizing sequential deposition techniques
02/20/2003WO2002069372A8 Self-coplanarity bumping shape for flip chip
02/20/2003WO2002063686A3 High performance silicon contact for flip chip
02/20/2003WO2002059967A3 Integrated circuits protected against reverse engineering and method for fabricating the same using vias without metal terminations
02/20/2003WO2002035897A9 Use of metallic treatment on copper foil to produce fine lines and replace oxide process in printed circuit board production
02/20/2003WO2001073883A3 Low-temperature fabrication of thin-film energy-storage devices
02/20/2003US20030037216 Memory module
02/20/2003US20030036317 Method for applying a semiconductor chip to a substrate and an assembly obtained thereby
02/20/2003US20030036303 Dual thermoelectric cooler optoelectronic package and manufacture process
02/20/2003US20030036292 Process for producing a semiconductor device
02/20/2003US20030036261 Semiconductor device and fabricating method thereof
02/20/2003US20030036260 Method for manufacturing a semiconductor device
02/20/2003US20030036257 Semiconductor device manufacturing method
02/20/2003US20030036256 Integrated circuit with bonding layer over active circuitry
02/20/2003US20030036254 Semiconductor processing methods, and semiconductor assemblies
02/20/2003US20030036245 Wafer and production thereof
02/20/2003US20030036229 Chip package and method for manufacturing the same
02/20/2003US20030036221 Thin film transistor array panel for liquid crystal display and method for manufacturing the same
02/20/2003US20030036220 Printed circuit board having plating conductive layer with bumps and its manufacturing method
02/20/2003US20030036219 Semiconductor device manufacturing method
02/20/2003US20030036218 Three-dimensional multichip module
02/20/2003US20030036211 Laser repair operation
02/20/2003US20030036020 Photosensitive conductive paste, method for forming conductive pattern using the same, and method for manufacturing ceramic multilayer element
02/20/2003US20030035948 Reflow resistance; for use in tape automated bonding; electrical properties; mechanical properties
02/20/2003US20030035937 Thick film paste systems for circuits on diamond substrates
02/20/2003US20030035270 Semiconductor chip package with cooling arrangement
02/20/2003US20030035269 Thermal bus design to cool a microelectronic die
02/20/2003US20030035267 Heat sink for cooling an electronic component of a computer
02/20/2003US20030035257 Bi-directional EOS/ESD protection device
02/20/2003US20030034867 Coil and coil system for integration into a micro-electronic circuit and microelectronic circuit
02/20/2003US20030034861 Microwave monolithic integrated circuit (MMIC) carrier interface
02/20/2003US20030034844 Crosstalk suppression in differential AC coupled multichannel IC amplifiers
02/20/2003US20030034821 Integrated circuit including active components and at least one passive component and associated fabrication method
02/20/2003US20030034796 Flat group-delay low-pass filter, mounting structure thereof, flat group-delay low-pass filter device, and optical signal receiver
02/20/2003US20030034571 Semiconductor memory device
02/20/2003US20030034569 Electronic package and method of forming
02/20/2003US20030034568 Semiconductor package with flash preventing mechanism and fabrication method thereof
02/20/2003US20030034567 Semiconductor device