Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 23 - Details of semiconductor or other solid state devices
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
03/2003
03/18/2003US6534391 Semiconductor package having substrate with laser-formed aperture through solder mask layer
03/18/2003US6534387 Semiconductor device and method of manufacturing the same
03/18/2003US6534386 Method of manufacturing semiconductor chips
03/18/2003US6534378 Method for forming an integrated circuit device
03/18/2003US6534349 Method of manufacturing a semiconductor device having a two-layered electrode structure
03/18/2003US6534344 Integrated circuit chip and method for fabricating the same
03/18/2003US6534343 Method of making electrically isolated power semiconductor package
03/18/2003US6534342 Adhesive of 75-95% isobutyl acetal diphenol copolymer and remainder metal oxide, especially TiO2, applied at room temperature through a stencil to the lead frame.
03/18/2003US6534341 Methods of wafer level fabrication and assembly of chip scale packages
03/18/2003US6534340 Cover cap for semiconductor wafer devices
03/18/2003US6534339 Semiconductor device comprising a socket and method for forming same
03/18/2003US6534337 Lead frame type plastic ball grid array package with pre-assembled ball type contacts
03/18/2003US6534327 Method for reworking metal layers on integrated circuit bond pads
03/18/2003US6534193 Liquid epoxy resin composition and semiconductor device
03/18/2003US6534190 Heat sink material in a semiconductor device comprising silicon carbide in aluminum or aluminum alloy matrix and a coating layer
03/18/2003US6534186 Chip carriers with enhanced wire bondability
03/18/2003US6534160 Dielectric is a non-fibrillated, fluoropolymer matrix that has inorganic particles distributed therein and is impreganated with a thermoset material; printed circuits; good adhesion, dimensional stability, laser drillability
03/18/2003US6534159 Side alignment mark
03/18/2003US6534117 Electroless plating method and electroless plating solution
03/18/2003US6533888 Apparatus and method for fabricating buried and flat metal features
03/18/2003US6533595 Socket for electrical parts
03/18/2003US6533589 Packaged device adapter assembly
03/18/2003US6533587 Circuit board riser
03/18/2003US6533391 Self-aligned modules for a page wide printhead
03/18/2003US6533029 Non-inverted meniscus loop heat pipe/capillary pumped loop evaporator
03/18/2003US6533028 Heat sink, method of manufacturing the same, and cooling apparatus using the same
03/18/2003US6532783 Clamping device, tool and method of mounting tools
03/18/2003US6532746 Method and apparatus for securing an electronic component
03/13/2003WO2003022020A2 Sheet material and its use in circuit boards
03/13/2003WO2003021737A1 An arrangement for esd protection of an integrated circuit
03/13/2003WO2003021690A2 Method of depositing an oxide layer on a substrate and a photovoltaic cell using said substrate
03/13/2003WO2003021681A1 Laser mark printing method of soi wafer, soi wafer and method for fabricating the same
03/13/2003WO2003021679A2 Integrated circuit structure and a method of making an integrated circuit structure
03/13/2003WO2003021678A1 Package for electronic components and method for forming a package for electronic components
03/13/2003WO2003021676A2 Connecting the emitter contacts of a semiconductor device
03/13/2003WO2003021675A2 Method for manufacturing a programmable chalcogenide fuse within a semiconductor device
03/13/2003WO2003021674A2 Microelectronic circuit package having die fixed within a package core
03/13/2003WO2003021673A1 High-frequency chip packages
03/13/2003WO2003021672A2 An electronic package having a thermal stretching layer
03/13/2003WO2003021671A1 Semiconductor radiating substrate and production method therefor and package
03/13/2003WO2003021670A1 Plastic ball grid array package with integral heatsink
03/13/2003WO2003021669A1 Composite structural material, and method of producing the same
03/13/2003WO2003021668A1 Wiring board, semiconductor device and method for producing them
03/13/2003WO2003021667A2 Package with integrated inductor and/or capacitor
03/13/2003WO2003021664A1 Semiconductor device, structural body and electronic device
03/13/2003WO2003021661A2 Process for making a mim capacitor
03/13/2003WO2003021658A1 Method and apparatus for treating organosiloxane coating
03/13/2003WO2003021614A1 Cascade capacitor
03/13/2003WO2003020510A1 Laminates prepared from impregnated flexible graphite sheets
03/13/2003WO2003001574A3 Double-sided semiconductor structures utilizing a compliant substrate
03/13/2003WO2002101820A3 Conductor track arrangement and method for production of an encapsulated conductor coupling
03/13/2003WO2002093642A3 Integrated sensor packaging and methods of making the same
03/13/2003WO2002089177A3 A contact structure of a wiring line and method manufacturing the same, and thin film transistor array substrate including the contact structure and method manufacturing the same
03/13/2003WO2002086968A3 Liquid-cooled power semiconductor device heatsink
03/13/2003WO2002080260A9 Deposition method, deposition apparatus, insulating film and semiconductor integrated circuit
03/13/2003WO2002073667A3 Formation of a frontside contact on silicon-on-insulator substrate
03/13/2003WO2002063676A3 A slot via filled dual damascene structure without middle stop layer and method for making the same
03/13/2003WO2002058112A3 Copper diffusion barriers
03/13/2003WO2002058108A3 Wafer applied fluxing and underfill material, and layered electronic assemblies manufactured therewith
03/13/2003WO2002056376A3 Method of integrating a heat spreader and a semiconductor, and package formed thereby
03/13/2003WO2002054467A3 Semiconductor structure including a monocrystalline conducting layer
03/13/2003WO2002050908A3 Gate length control for semiconductor chip design
03/13/2003WO2002043308A3 Electromagnetic noise reduction device
03/13/2003WO2002043119A3 An ultralow dielectric constant material as an intralevel or interlevel dielectric in a semiconductor device, a method for fabricating the same, and an electronic device containing the same
03/13/2003WO2002015265A3 Vibration and shock resistant heat sink assembly
03/13/2003WO2001073870A3 Integrated capacitor-like battery and associated method
03/13/2003WO2000074552A3 Method for determinig alert window parameters for etc signal delivery
03/13/2003US20030051225 Method for generating mask data, masks, recording media, and method for manufacturing semiconductor devices
03/13/2003US20030051218 Method for designing wiring connecting section and semiconductor device
03/13/2003US20030050438 Electrochemical solid phase synthesis
03/13/2003US20030050437 Electrochemical solid phase synthesis
03/13/2003US20030050399 Cured epoxy resin provides solder crack resistance on use of lead-free solder and improved flame retardance
03/13/2003US20030049952 Method and apparatus to compliantly interconnect commercial-off-the-shelf chip scale packages and printed wiring boards
03/13/2003US20030049945 Interconnection structure and method for designing the same
03/13/2003US20030049924 Microelectronic fabrication having formed therein terminal electrode structure providing enhanced barrier properties
03/13/2003US20030049923 Method to improve the reliability of thermosonic gold to aluminum wire bonds
03/13/2003US20030049922 Rectangular contact used as a low voltage fuse element
03/13/2003US20030049915 Semiconductor device, method of fabricating the same and semiconductor device fabricating apparatus
03/13/2003US20030049891 Utilization of MACRO power routing area for buffer insertion
03/13/2003US20030049889 Method of manufacturing multilayer modules
03/13/2003US20030049888 Semiconductor device and method of making the same
03/13/2003US20030049887 Semiconductor device and a method of manufacturing the same
03/13/2003US20030049886 Electronic system modules and method of fabrication
03/13/2003US20030049885 Semiconductor package, method of manufacturing the same, and semiconductor device
03/13/2003US20030049884 Apparatus with compliant electrical terminals, and methods for forming same
03/13/2003US20030049883 Semiconductor package production method and semiconductor package
03/13/2003US20030049874 Test element group, method of manufacturing a test element group, method of testing a semiconductor device, and semiconductor device
03/13/2003US20030049872 Mask alignment structure for IC layers
03/13/2003US20030049871 Chip manufacturing method for cutting test pads from integrated circuits by sectioning circuit chips from circuit substrate
03/13/2003US20030049517 Metal-air battery components and methods for making same
03/13/2003US20030049466 Polysiloxane; integrated circuit
03/13/2003US20030049460 Low dielectric constant material and method of processing by CVD
03/13/2003US20030049425 Semiconductor device, mounting circuit board, method of producing the same, and method of producing mounting structure using the same
03/13/2003US20030049424 Stacking of multilayer modules
03/13/2003US20030049193 For use in printed circuit boards; semiconductors
03/13/2003US20030048663 Low voltage non-volatile memory cell
03/13/2003US20030048624 Low-height multi-component assemblies
03/13/2003US20030048619 Dielectrophoretic assembling of electrically functional microwires
03/13/2003US20030048612 Electronic assemblies with high capacity curved fin heat sinks
03/13/2003US20030048610 Heat sink retention apparatus
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