Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
03/2003
03/20/2003WO2003023847A2 Integrated circuit, portable device and method for manufacturing an integrated circuit
03/20/2003WO2003023843A1 Semiconductor device, its manufacturing method, and radio communication device
03/20/2003WO2003023831A1 Silicone resins and porous materials produced therefrom
03/20/2003WO2003023823A2 Stacking of multilayer modules
03/20/2003WO2003023821A2 Hermetic seal
03/20/2003WO2003023819A2 Apparatus with compliant electrical terminals, and methods for forming same
03/20/2003WO2003023795A1 Magnetic component
03/20/2003WO2003023289A2 Integrated cooler for electronic devices
03/20/2003WO2003022949A1 Cationic polymerizable adhesive composition and anisotropically electroconductive adhesive composition
03/20/2003WO2003022778A2 Low temperature cofired ceramics (ltcc) temperature stability
03/20/2003WO2003022733A2 Nanotube films and articles
03/20/2003WO2003022732A2 Method for the production of a membrane
03/20/2003WO2003003453A3 Assembling a diode and two electrodes
03/20/2003WO2003001589A3 A method of selectively alloying interconnect regions by depostion process
03/20/2003WO2002100140A3 Circuit board with at least one electronic component
03/20/2003WO2002078083A3 In-street integrated circuit wafer via
03/20/2003WO2002075797A3 Method of forming copper interconnects
03/20/2003WO2002071456A3 Magnetic layer processing
03/20/2003WO2002067299A3 Method and related apparatus of processing a substrate
03/20/2003WO2002058140A3 Integrated inductor
03/20/2003WO2002045163A3 Method for producing semiconductor modules and a module produced according to said method
03/20/2003WO2002045162A3 Interposer for a semiconductor module, semiconductor produced using such an interposer and method for producing such an interposer
03/20/2003WO2002023630A3 Micromachined silicon block vias for transferring electrical signals to the backside of a silicon wafer
03/20/2003US20030056191 Method of designing active region pattern with shift dummy pattern
03/20/2003US20030055618 Process variable identification method, process variable identification apparatus, and evaluation sample
03/20/2003US20030054671 Method for forming insulation film and method for manufacturing semiconductor device
03/20/2003US20030054670 Composite microelectronic dielectric layer with inhibited crack susceptibility
03/20/2003US20030054666 Silicone polymer insulation film on semiconductor substrate
03/20/2003US20030054659 Method for fabricating a circuit device
03/20/2003US20030054656 Method for manufacturing semiconductor device including two-step ashing process of N2 plasma gas and N2/H2 plasma gas
03/20/2003US20030054653 Wiring and method of manufacturing the same, and wiring board and method of manufacturing the same
03/20/2003US20030054648 CMP apparatus and method for polishing multiple semiconductor wafers on a single polishing pad using multiple slurry delivery lines
03/20/2003US20030054635 Fabrication of a metalized blind via
03/20/2003US20030054631 Protective layers prior to alternating layer deposition
03/20/2003US20030054627 Methods of making microelectronic assemblies using bonding stage and bonding stage therefor
03/20/2003US20030054626 Method of forming a bond pad and structure thereof
03/20/2003US20030054623 Use of atomic oxygen process for improved barrier layer
03/20/2003US20030054622 Semiconductor device manufacturing method and semiconductor device
03/20/2003US20030054621 Semiconductor processing methods of forming contact openings, methods of forming electrical connections and interconnections, and integrated circuitry
03/20/2003US20030054597 Method of manufacturing semiconductor device including steps of forming both insulating film and epitaxial semiconductor on substrate
03/20/2003US20030054594 Method of manufacturing a semiconductor integrated circuit
03/20/2003US20030054592 Method and apparatus for fabricating electronic device
03/20/2003US20030054590 Semiconductor device and method of production of same
03/20/2003US20030054589 Method of improving mount assembly in a multilayer PCB's
03/20/2003US20030054575 Method for adding redundant vias on vlsi chips
03/20/2003US20030054218 Method for making composite particles including a polymer phase
03/20/2003US20030054188 Silicon carbide impregnated with copper alloy
03/20/2003US20030053298 Liquid cooled circuit device and a manufacturing method thereof
03/20/2003US20030053297 Coupled-cap flip chip BGA package with improved cap design for reduced interfacial stresses
03/20/2003US20030053296 Cooling device capable of reducing thickness of electronic apparatus
03/20/2003US20030053294 Liquid cooled circuit device and a manufacturing method thereof
03/20/2003US20030053277 Integrated circuit device with bump bridges and method for making the same
03/20/2003US20030053060 Semiconductor wafer bearing alignment mark for use in aligning the wafer with exposure equipment, alignment system for producing alignment signals from the alignement mark, and method of determining the aligned state of a wafer from the alignemnt mark
03/20/2003US20030052712 Electrically-programmable interconnect architecture for easily-configurable stacked circuit arrangements
03/20/2003US20030052655 Integrated magnetic buck converter with magnetically coupled synchronously rectified mosfet gate drive
03/20/2003US20030052440 Improving alignment accuracy in processing fuses that are used for circuits, laser-machining the fuse wire, alignment using the target mark formed in the metal layer
03/20/2003US20030052421 Mark configuration, wafer with at least one mark configuration and method for the fabrication of at least one mark configuration
03/20/2003US20030052420 Semiconductor device
03/20/2003US20030052419 Semiconductor device and method of manufacturing the same
03/20/2003US20030052417 Semiconductor device
03/20/2003US20030052415 Solder bump structure and a method of forming the same
03/20/2003US20030052414 Integrated circuit chip having a surface polymer-coatings and a plurality of electrical coupling members, polymeric underfill material filling the gap between coupling members, polymer coatings and substrate; flip-chip assembly
03/20/2003US20030052413 Semiconductor device
03/20/2003US20030052412 Semiconductor device and method for fabricating the same
03/20/2003US20030052411 Semiconductor device and method for manufacturing the same
03/20/2003US20030052410 Comprising multi-semiconductor chips, second semiconductor chips formed in an area surrounded by the first semiconductor chips, integrated circuit and pads are electrically connected, and columnar shape bumps formed over the pads
03/20/2003US20030052409 Semiconductor device and method of manufacturing the same
03/20/2003US20030052408 Semiconductor device including molded wireless exposed drain packaging
03/20/2003US20030052407 Electronic component
03/20/2003US20030052405 Semiconductor device
03/20/2003US20030052403 Method of vacuum packaging a semiconductor device assembly
03/20/2003US20030052402 Lead frame decoupling capacitor, semiconductor device packages including the same and methods
03/20/2003US20030052400 Semiconductor device
03/20/2003US20030052399 Semiconductor device having semiconductor element packaged on interposer
03/20/2003US20030052397 Method for rewiring pads in a wafer-level package
03/20/2003US20030052396 A thermosetting resin package sealed inside a thermoplastic resin housing, are bonded together with a modified face on package, adhesion by ultraviolet radiation
03/20/2003US20030052395 Semiconductor device and design support method of electronic device using the same
03/20/2003US20030052394 Semiconductor device
03/20/2003US20030052393 Semiconductor device
03/20/2003US20030052392 Support for microelectronic, microoptoelectronic or micromechanical devices
03/20/2003US20030052386 An interlayer dielectric film covering the resistor layer has first and second embedded plugs providing the interconnection to reduce in temperature rise in resistor elements
03/20/2003US20030052385 Semiconductor devices
03/20/2003US20030052368 Input protection circuit
03/20/2003US20030052367 Apparatus and method for improved power bus esd protection
03/20/2003US20030052355 Integrated sound transmitter and receiver, and corresponding method for making same
03/20/2003US20030052352 Semiconductor device and method of fabricating the same
03/20/2003US20030052341 Semiconductor integrated circuit device
03/20/2003US20030052340 Magnetic shielding for integrated circuits
03/20/2003US20030052339 Semiconductor device having a multilayer wiring structure and pad electrodes protected from corrosion, and method for fabricating the same
03/20/2003US20030052335 Metal-insulator-metal capacitor and a method for producing same
03/20/2003US20030052332 ESD protection circuit having a high triggering threshold
03/20/2003US20030052329 Semiconductor device
03/20/2003US20030052156 A soldering means having a curved exterior surface enclosing a first volume, and an interior cavity having a displacement constituting a second volume, useful for electrical and mechaincal connecting two metal planer surfaces
03/20/2003US20030051995 Plating device and plating method
03/20/2003US20030051912 Solder pads and method of making a solder pad
03/20/2003US20030051910 Electrical and physical design integration method and apparatus for providing interconnections on first level ceramic chip carrier packages
03/20/2003US20030051909 Ball grid array attaching means having improved reliability and method of manufacturing same
03/20/2003US20030051908 Dram module package
03/20/2003US20030051893 Surface-mounting connector and semiconductor module using the same
03/20/2003US20030051868 Iodine-containing thermal interface material