Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 23 - Details of semiconductor or other solid state devices
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
04/2003
04/08/2003US6545867 Thermal-resistance variable heat sink structure and method of using the same
04/08/2003US6545392 Package structure for a piezoelectric resonator
04/08/2003US6545371 Semiconductor device wherein detection of removal of wiring triggers impairing of normal operation of internal circuit
04/08/2003US6545369 Overlay error reduction by minimization of unpatterned wafer area
04/08/2003US6545368 Use of an oxide surface to facilitate gate break on a carrier substrate for a semiconductor device
04/08/2003US6545367 Semiconductor package substrate, semiconductor package
04/08/2003US6545366 Multiple chip package semiconductor device
04/08/2003US6545365 Resin-sealed chip stack type semiconductor device
04/08/2003US6545364 Circuit device and method of manufacturing the same
04/08/2003US6545363 Contactor having conductive particles in a hole as a contact electrode
04/08/2003US6545362 Semiconductor device and method of manufacturing the same
04/08/2003US6545361 Semiconductor device having multilevel interconnection structure and method for fabricating the same
04/08/2003US6545360 Multilayer; semiconductor substrate, dielectric with apertures, plugging with electroconductive metal
04/08/2003US6545359 Wiring line and manufacture process thereof, and semiconductor device and manufacturing process thereof
04/08/2003US6545358 Integrated circuits having plugs in conductive layers therein and related methods
04/08/2003US6545357 Metal nitride barrier layer and electroplating seed layer with the same metal as the metal nitride layer
04/08/2003US6545355 Semiconductor device and method of fabricating the same
04/08/2003US6545354 Semiconductor device having a barrier layer
04/08/2003US6545353 Multilayer wiring board and semiconductor device
04/08/2003US6545352 Assembly for mounting power semiconductive modules to heat dissipators
04/08/2003US6545351 Underside heat slug for ball grid array packages
04/08/2003US6545350 Integrated circuit packages and the method for the same
04/08/2003US6545349 Semiconductor device
04/08/2003US6545348 Package for a semiconductor device comprising a plurality of interconnection patterns around a semiconductor chip
04/08/2003US6545347 Enhanced leadless chip carrier
04/08/2003US6545346 Integrated circuit package with a capacitor
04/08/2003US6545345 Mounting for a package containing a chip
04/08/2003US6545344 Semiconductor leadframes plated with lead-free solder and minimum palladium
04/08/2003US6545343 Hybrid frame with lead-lock tape
04/08/2003US6545342 Pre-finished leadframe for semiconductor devices and method of fabrication
04/08/2003US6545339 Semiconductor device incorporating elements formed of refractory metal-silicon-nitrogen and method for fabrication
04/08/2003US6545338 Methods for implementing co-axial interconnect lines in a CMOS process for high speed RF and microwave applications
04/08/2003US6545332 Image sensor of a quad flat package
04/08/2003US6545321 ESD protection circuit for a semiconductor integrated circuit
04/08/2003US6545228 Semiconductor device with a plurality of stacked boards and method of making
04/08/2003US6545227 Pocket mounted chip having microstrip line
04/08/2003US6545212 Radiation noise suppressing component attachment structure
04/08/2003US6544908 Ammonia gas passivation on nitride encapsulated devices
04/08/2003US6544904 Method of manufacturing semiconductor device
04/08/2003US6544902 Energy beam patterning of protective layers for semiconductor devices
04/08/2003US6544885 Polished hard mask process for conductor layer patterning
04/08/2003US6544884 Semiconductor device and method of fabricating same
04/08/2003US6544881 Stacked local interconnect structure and method of fabricating same
04/08/2003US6544880 Method of improving copper interconnects of semiconductor devices for bonding
04/08/2003US6544879 Insitu radiation protection of integrated circuits
04/08/2003US6544878 Microelectronic fabrication having formed therein terminal electrode structure providing enhanced barrier properties
04/08/2003US6544871 Method of suppressing void formation in a metal line
04/08/2003US6544866 Semiconductor device fabricated on multiple substrate
04/08/2003US6544864 Methods employing hybrid adhesive materials to secure components of semiconductor device assemblies and packages to one another and assemblies and packages including components secured to one another with such hybrid adhesive materials
04/08/2003US6544859 Semiconductor processing methods and structures for determining alignment during semiconductor wafer processing
04/08/2003US6544837 SOI stacked DRAM logic
04/08/2003US6544831 Semiconductor device and method for manufacturing the same
04/08/2003US6544830 Method of manufacturing a semiconductor device with multiple emitter contact plugs
04/08/2003US6544821 Stereolithographic methods of fabricating semiconductor devices having protective layers thereon through which contact pads are exposed
04/08/2003US6544820 Plastic lead frames for semiconductor devices, packages including same, and methods of fabrication
04/08/2003US6544818 Method of manufacturing semiconductor device
04/08/2003US6544816 Method of encapsulating thin semiconductor chip-scale packages
04/08/2003US6544814 Method of manufacturing a packaged semiconductor device, and a semiconductor device manufactured thereby
04/08/2003US6544813 Method of making a semiconductor chip assembly with a conductive trace subtractively formed before and after chip attachment
04/08/2003US6544812 Single unit automated assembly of flex enhanced ball grid array packages
04/08/2003US6544807 Process monitor with statistically selected ring oscillator
04/08/2003US6544805 Method for determining the internal orientation of a wafer
04/08/2003US6544804 Semiconductor wafer having identification indication and method of manufacturing the same
04/08/2003US6544651 High dielectric constant nano-structure polymer-ceramic composite
04/08/2003US6544638 Electronic chip package
04/08/2003US6544428 Method for producing a multi-layer circuit board using anisotropic electro-conductive adhesive layer
04/08/2003US6544044 Socket for BGA package
04/08/2003US6543676 Pin attachment by a surface mounting method for fabricating organic pin grid array packages
04/08/2003US6543674 Multilayer interconnection and method
04/08/2003US6543524 Overplated thermally conductive part with EMI shielding
04/08/2003US6543522 Arrayed fin cooler
04/08/2003US6543521 Cooling element and cooling apparatus using the same
04/08/2003US6543510 Apparatus and methods for coverlay removal and adhesive application
04/08/2003US6543246 Integrated circuit cooling apparatus
04/08/2003US6543131 Connecting; removal support; semiconductors
04/08/2003US6543128 Ball grid array package and its fabricating process
04/08/2003US6543109 Method of manufacturing a surface acoustic wave apparatus
04/08/2003CA2280937C Electronic or optoelectronic housing with ceramic insert
04/08/2003CA2268650C Superconducting heat transfer medium
04/05/2003CA2401938A1 Apparatus and method for shielding a device
04/03/2003WO2003028422A1 Electronic apparatus
04/03/2003WO2003028420A1 Thermal management of power delivery systems for integrated circuits
04/03/2003WO2003028418A1 Thin film circuit board device and its manufacturing method
04/03/2003WO2003028412A2 Test structures and models for estimating the yield impact of dishing and/or voids
04/03/2003WO2003028165A1 Wiring board having terminal
04/03/2003WO2003028159A2 Metallic surface of a body, method for producing a structured metallic surface of a body and the use thereof
04/03/2003WO2003028102A2 Modification of the function of a chip using a multi-chip housing
04/03/2003WO2003028101A2 Method of producing a contact system on the rear face of a component with stacked substrates
04/03/2003WO2003028100A2 Encapsulation of pin solder for maintaining accuracy in pin position
04/03/2003WO2003028099A2 Arrangement of vias in a substrate to support a ball grid array
04/03/2003WO2003028098A2 Programmable chip-to-substrate interconnect structure and device and method of forming same
04/03/2003WO2003028097A1 Production method for semiconductor device
04/03/2003WO2003028096A2 Multilayer thin film hydrogen getter
04/03/2003WO2003028095A2 Power delivery and other systems for integrated circuits
04/03/2003WO2003028094A2 Method of self-assembly of electronic or optical components using an adhesive
04/03/2003WO2003028092A2 Dual-damascene interconnects without an etch stop layer by alternating ilds
04/03/2003WO2003028091A2 Copper interconnect barrier layer structure and formation method
04/03/2003WO2003028090A2 Integration of barrier layer and seed layer
04/03/2003WO2003028088A2 Methods of forming metallurgy structures for wire and solder bonding and related structures
04/03/2003WO2003028085A2 Method for producing a ceramic substrate
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