Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
04/2003
04/17/2003WO2003031898A1 High heat flux single-phase heat exchanger
04/17/2003WO2003031897A1 Heat collector with mounting plate
04/17/2003WO2003031674A1 Method of depositing a material layer
04/17/2003WO2003031528A1 Adhesive sheet of cross-linked silicone, method of manufacturing thereof, and device_comprising the sheet
04/17/2003WO2003031373A2 Thick film conductor compositions for use on aluminum nitride substrates
04/17/2003WO2003031193A1 Method of manufacturing an electronic component and electronic component obtained by means of said method
04/17/2003WO2003031101A1 Highly filled composites of powdered fillers and polymer matrix
04/17/2003WO2002080229A3 Microelectronic assembly with die support and method
04/17/2003WO2002067319A3 Copper interconnect structure having diffusion barrier
04/17/2003WO2002059962A3 Viscous protective overlayers for planarization of integrated circuits
04/17/2003WO2002058143A3 Cvd diamond enhanced microprocessor cooling system
04/17/2003WO2002049107A3 Method for stacking semiconductor die within an implanted medical device
04/17/2003WO2002037563A3 A leadframe and semiconductor package
04/17/2003WO2001073868A3 Device enclosures and devices with integrated battery
04/17/2003WO1999060829A3 Method and apparatus for making electrical traces, circuits and devices
04/17/2003US20030073769 Mixture containing boron nitride powder and surfactant
04/17/2003US20030073349 Structure of joining chip part to bus bars
04/17/2003US20030073347 Package for opto-electrical components
04/17/2003US20030073317 Method of manufacturing a semiconductor device and a semiconductor device
04/17/2003US20030073314 GCIB processing to improve interconnection vias and improved interconnection via
04/17/2003US20030073306 Semiconductor processing methods of forming integrated circuitry, forming conductive lines, forming a conductive grid, forming a conductive network, forming an electrical interconnection to a node location, forming an electrical interconnection with a transistor source/drain region, and integrated circuitry
04/17/2003US20030073296 A Method Of Forming At Least One Interconnection To A Source/Drain Region In Silicon-On-Insulator Integrated Circuitry
04/17/2003US20030073282 Vertical/horizontal MIMCap method
04/17/2003US20030073281 Semiconductor memory device and manufacturing method thereof
04/17/2003US20030073268 Semiconductor processing methods of forming integrated circuitry, forming conductive lines, forming a conductive grid, forming a conductive network, forming an electrical interconnection to a node location, forming an electrical interconnection with a transistor source/drain region, and integrated circuitry
04/17/2003US20030073266 Semiconductor device and a method of manufacturing the same
04/17/2003US20030073265 Semiconductor package with singulation crease
04/17/2003US20030073257 Semiconductor device manufacturing method capable of reliable inspection for hole opening and semiconductor devices manufactured by the method
04/17/2003US20030072953 Aceto acetonate and related compounds as adhesion promoters
04/17/2003US20030072947 Uniform pore distribution thus retain high rigidity thus are suitable for manufacturing of integrated circuits
04/17/2003US20030072928 Self-aligned corrosion stop for copper C4 and wirebond
04/17/2003US20030072927 Method for manufacturing solder mask of printed circuit board
04/17/2003US20030072926 Stereolithographically marked semiconductor devices and methods
04/17/2003US20030072913 Substrate strip with sides having flanges and recesses
04/17/2003US20030072888 Forming a wiring and a first insulating layer filled between the wirings on a substratum, immersing in fluid which can dissolve the first insulating layer, substituting, for the fluid, a raw material solution; filling insulating layer
04/17/2003US20030072880 Method of controlling the initial growth of CVD copper films by surface treatment of barrier metals films
04/17/2003US20030072832 Packaging mold with electrostatic discharge protection
04/17/2003US20030072608 Attachment mechanism
04/17/2003US20030072196 Method for manufacturing an integrated memory circuit and an integrated memory circuit
04/17/2003US20030072140 Resistive element apparatus and method
04/17/2003US20030072136 Circuit board and production method therefor
04/17/2003US20030072134 Electronic apparatus including a cooling unit for cooling a heat generating component
04/17/2003US20030072125 Cascade capacitor
04/17/2003US20030071997 Method for determining semiconductor overlay on groundrule devices
04/17/2003US20030071700 Coaxial type signal line and manufacturing method thereof
04/17/2003US20030071647 Method and arrangement for determining the high-frequency behavior of active circuit elements
04/17/2003US20030071395 Conformal-coated pick and place compatible devices
04/17/2003US20030071369 High contrast alignment marks having flexible placement
04/17/2003US20030071368 Epoxy resin compositions, solid state devices encapsulated therewith and method
04/17/2003US20030071367 Epoxy resin compositions, solid state devices encapsulated therewith and method
04/17/2003US20030071365 Electronic device fabrication method comprising twofold cutting of conductor member
04/17/2003US20030071364 Wiring pattern of semiconductor device
04/17/2003US20030071363 Semiconductor device
04/17/2003US20030071361 Structure and method for charge sensitive electrical devices
04/17/2003US20030071357 Integrated circuitry
04/17/2003US20030071356 First trench isolation material is deposited over the semiconductor substrate and to within the isolation trench, first trench isolation material is removed to form a line trench into a desired local interconnect configuration
04/17/2003US20030071355 Interconnect structures and a method of electroless introduction of interconnect structures
04/17/2003US20030071354 Wafer level chip scale package and method of fabricating the same
04/17/2003US20030071353 Semiconductor device
04/17/2003US20030071352 Method of fabricating resin-encapsulated semiconductor device
04/17/2003US20030071351 Method for fabricating a microcontact spring on a substrate
04/17/2003US20030071350 High-frequency semiconductor device
04/17/2003US20030071349 Electronic circuit unit suitable for miniaturization
04/17/2003US20030071348 Semiconductor module and mounting method for same
04/17/2003US20030071347 Semiconductor chip packaging device and method of manufacturing the same
04/17/2003US20030071346 Flexible lead structures and methods of making same
04/17/2003US20030071345 Die paddle clamping method for wire bond enhancement
04/17/2003US20030071344 Leadframe and method of manufacturing a semiconductor device using the same
04/17/2003US20030071343 Integrated circuit bus grid having wires with pre-selected variable widths
04/17/2003US20030071341 Apparatus and method for leadless packaging of semiconductor devices
04/17/2003US20030071339 Semiconductor device with integrated circuit elements of group iii-v comprising means for preventing pollution by hyfrogen.
04/17/2003US20030071338 Apparatus and method for leadless packaging of semiconductor devices
04/17/2003US20030071337 Laminate film packaged storage device and fabricating method thereof
04/17/2003US20030071336 Electronic component with at least one semiconductor chip and method for its manufacture
04/17/2003US20030071335 Apparatus and method for leadless packaging of semiconductor devices
04/17/2003US20030071334 Method and system for electrically coupling a chip to chip package
04/17/2003US20030071333 Leadframe, method of manufacturing the same, and method of manufacturing a semiconductor device using the same
04/17/2003US20030071332 Semiconductor packaging structure
04/17/2003US20030071331 Semiconductor device and structure for mounting the same
04/17/2003US20030071330 Strength and durability of a spring structure is increased by providing a stress-balancing pad formed on the unlifted anchor portion of the spring metal finger
04/17/2003US20030071329 Wafer integrated rigid support ring
04/17/2003US20030071326 High performance system-on-chip using post passivation process
04/17/2003US20030071324 Antifuse with electrostatic assist
04/17/2003US20030071323 Microelectronic fabrication with upper lying aluminum fuse layer in copper interconnect semiconductor technology and method for fabrication thereof
04/17/2003US20030071319 Structure and method for bond pads of copper-metallized integrated circuits
04/17/2003US20030071310 Shallow buried region of higher resistivity than the first resistivity, extending between the isolation trenches and created by a compensated doping; electrostatic discharging (esd) and metal oxide semiconductor (mos)
04/17/2003US20030071293 Semiconductor memory device and manufacturing process for the same
04/17/2003US20030071287 Scratch resistance improvement by filling metal gaps
04/17/2003US20030071284 Semiconductor device
04/17/2003US20030071283 Semiconductor structure with one or more through-holes
04/17/2003US20030071280 Method of fabricating seal-ring structure with ESD protection
04/17/2003US20030071272 Topside active optical device apparatus and method
04/17/2003US20030071264 Method and apparatus for bonding substrates
04/17/2003US20030071263 Semiconductor device having dummy patterns for metal CMP
04/17/2003US20030071262 Apparatus and methods for semiconductor IC failure detection
04/17/2003US20030071261 Apparatus and methods for semiconductor IC failure detection
04/17/2003US20030071129 Module card and a method for manufacturing the same
04/17/2003US20030071014 Method for manufacturing solder mask of printed circuit board
04/17/2003US20030070839 Interconnect structure and method of making same
04/17/2003US20030070836 PGA chip package and process for same