Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 23 - Details of semiconductor or other solid state devices
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
04/2003
04/29/2003US6555917 Semiconductor package having stacked semiconductor chips and method of making the same
04/29/2003US6555914 Comprises reduced parasitic capacitance; constructed as electroconductive laminated layers
04/29/2003US6555913 Electronic component having a coil conductor with photosensitive conductive paste
04/29/2003US6555912 Corrosion-resistant electrode structure for integrated circuit decoupling capacitors
04/29/2003US6555911 Semiconductor device and method of manufacturing interconnections thereof using copper and tungsten in predetermined ratios
04/29/2003US6555910 Use of small openings in large topography features to improve dielectric thickness control and a method of manufacture thereof
04/29/2003US6555909 Seedless barrier layers in integrated circuits and a method of manufacture therefor
04/29/2003US6555908 Compliant, solderable input/output bump structures
04/29/2003US6555907 High-frequency integrated circuit and high-frequency circuit device using the same
04/29/2003US6555906 Microelectronic package having a bumpless laminated interconnection layer
04/29/2003US6555905 Heat conductive silicone composition and semiconductor device
04/29/2003US6555904 Electrically shielded glass lid for a packaged device
04/29/2003US6555901 Semiconductor device including eutectic bonding portion and method for manufacturing the same
04/29/2003US6555900 Package, semiconductor device and method for fabricating the semiconductor device
04/29/2003US6555899 Semiconductor package leadframe assembly and method of manufacture
04/29/2003US6555898 Dam structure for center-bonded chip package
04/29/2003US6555897 Assembly for attaching die to leads
04/29/2003US6555893 Bar circuit for an integrated circuit
04/29/2003US6555892 Semiconductor device with reduced line-to-line capacitance and cross talk noise
04/29/2003US6555887 Semiconductor device with multi-layer interconnection
04/29/2003US6555884 Semiconductor device for providing a noise shield
04/29/2003US6555878 Umos-like gate-controlled thyristor structure for ESD protection
04/29/2003US6555876 Thin film transistor array substrate having laser illumination indicator
04/29/2003US6555853 Semiconductor device having embedded array
04/29/2003US6555764 Used to electrically test integrated circuit of large-scale integration device with terminals of integrated circuit being connected to contacts of integrated circuit contactor
04/29/2003US6555763 Multilayered circuit board for semiconductor chip module, and method of manufacturing the same
04/29/2003US6555762 Electronic package having substrate with electrically conductive through holes filled with polymer and conductive composition
04/29/2003US6555759 Interconnect structure
04/29/2003US6555758 Multiple blank for electronic components such as SAW components, and method of building up bumps, solder frames, spacers and the like
04/29/2003US6555757 Pin solder jointed to a resin substrate, made having a predetermined hardness and dimensions
04/29/2003US6555756 Printed wiring board having cavity for mounting electronic parts therein and method for manufacturing thereof
04/29/2003US6555755 Flexible interconnecting substrate and method of manufacturing the same, film carrier, tape-shaped semiconductor device, semiconductor device, circuit board, and electronic equipment
04/29/2003US6555602 Semiconductor encapsulation with low viscosity at </= 80 degrees c
04/29/2003US6555486 Thermally conductive silk-screenable interface material
04/29/2003US6555478 Stacked local interconnect structure and method of fabricating same
04/29/2003US6555471 Method of making a void-free aluminum film
04/29/2003US6555469 Chip scale packages
04/29/2003US6555467 Method of making air gaps copper interconnect
04/29/2003US6555464 Semiconductor device and method of manufacturing the same
04/29/2003US6555462 Semiconductor device having stress reducing laminate and method for manufacturing the same
04/29/2003US6555461 Method of forming low resistance barrier on low k interconnect
04/29/2003US6555460 Methods for mask repattern process
04/29/2003US6555459 Method of manufacturing a semiconductor device
04/29/2003US6555458 Fabricating an electrical metal fuse
04/29/2003US6555456 Method of forming iridium conductive electrode/barrier structure
04/29/2003US6555444 Device and method for core buildup using a separator
04/29/2003US6555440 Process for fabricating a top side pitted diode device
04/29/2003US6555416 Chip size package semiconductor device and method of forming the same
04/29/2003US6555415 Electronic configuration with flexible bonding pads
04/29/2003US6555412 Packaged semiconductor chip and method of making same
04/29/2003US6555409 Method for fabricating a thin film transistor array substrate for liquid crystal display
04/29/2003US6555400 Method for substrate mapping
04/29/2003US6555296 Providing wafer that has contact pads exposed by a passivation layer formed on surface of wafer; forming a first mask film having a openings; filling solder material in openings; reflowing solder material into solder posts
04/29/2003US6555260 Fuel cell system having a fuel cell stack with integrated polarity reversal protection diode
04/29/2003US6555208 Printed wiring board and method of manufacturing the same
04/29/2003US6555204 Method of preventing bridging between polycrystalline micro-scale features
04/29/2003US6555200 Method of making semiconductor devices, semiconductor device, circuit board, and electronic apparatus
04/29/2003US6555183 Plasma treatment of a titanium nitride film formed by chemical vapor deposition
04/29/2003US6555022 Oxygen-containing, such as metal oxides, silicates, borates or titanates, small particle size, narrow particle size distribution; displays
04/29/2003US6554609 Nanotechnology for electrical devices
04/29/2003US6554598 Mold assembly for encapsulating semiconductor device
04/29/2003US6554137 Device and method for protecting electronic component
04/29/2003US6554060 Heat sink with fins
04/29/2003US6553657 Joining electronic chips to electrodes by forming solder paste layers and screen printing or melting in furnaces, then encapsulating in seals to supress defects
04/24/2003WO2003034799A1 Power delivery connector for integrated circuits with capacitor
04/24/2003WO2003034497A1 Integrated circuit bus grid having wires with pre-selected variable widths
04/24/2003WO2003034496A1 Information recorder and electronic apparatus with mounted information recorder
04/24/2003WO2003034495A2 Method for packing electronic modules and multiple chip packaging
04/24/2003WO2003034494A1 Module component
04/24/2003WO2003034493A2 High frequency power amplifier having an integrated passive adapter
04/24/2003WO2003034492A2 Apparatus and methods for semiconductor ic failure detection
04/24/2003WO2003034491A2 Semiconductor component
04/24/2003WO2003034490A2 Semiconductor structure with one or more through-holes
04/24/2003WO2003034489A1 Thermal interface material and electronic assembly having such a thermal interface material
04/24/2003WO2003034488A1 Substrate and method for producing the same
04/24/2003WO2003034487A1 Semiconductor device and printed substrate used for the semiconductor device
04/24/2003WO2003034486A2 Thin metal package and manufacturing method thereof
04/24/2003WO2003034482A2 Method for selecting faulty dielectrics of a semiconductor component
04/24/2003WO2003034468A2 Crosstalk reduction in a crosspoint thyristor switching array using a shielded dielectric stack
04/24/2003WO2003034467A2 Semiconductor power module
04/24/2003WO2003033199A1 Method for improved wafer alignment
04/24/2003WO2003005437A3 Interconnect system and method of fabrication
04/24/2003WO2002084736A3 Microelectronic spring with additional protruding member
04/24/2003WO2002050907A3 Interconnection of active and passive components in substrate
04/24/2003WO2002050889A3 Contact hump construction for the production of a connector construction for substrate connecting surfaces
04/24/2003WO2002048701A3 Nanosensors
04/24/2003WO2002047161A3 Barrier against overflow for fixing adhesive of a semiconductor chip
04/24/2003WO2002037565A3 Method of connecting conductors on different levels of a microelectronic device and associated apparatus
04/24/2003WO2001099188A3 Semiconductor package and method
04/24/2003US20030079196 Method for fabricating an integrated semiconductor circuit
04/24/2003US20030079194 Method of automatic layout design for LSI, mask set and semiconductor integrated circuit manufactured by automatic layout design method, and recording medium storing automatic layout design program
04/24/2003US20030078484 Substrate sensor
04/24/2003US20030077981 Composition and a method for defect reduction
04/24/2003US20030077940 Housing device and contact element to be used in the housing device
04/24/2003US20030077924 High-frequency wiring board
04/24/2003US20030077913 Method of alloying a semiconductor device
04/24/2003US20030077895 Diffusion barrier layer for semiconductor wafer fabrication
04/24/2003US20030077892 Method for forming aerial metallic wiring on semiconductor substrate
04/24/2003US20030077883 Deposition method, deposition apparatus, and semiconductor device
04/24/2003US20030077877 Systems and methods for electrically isolating portions of wafers
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