Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 23 - Details of semiconductor or other solid state devices
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
05/2003
05/15/2003US20030092261 Substrate processing method
05/15/2003US20030092259 Method to fabricate NIM capacitor using damascene process
05/15/2003US20030092256 Method of manufacturing semiconductor device and its device
05/15/2003US20030092254 Common ball-limiting metallurgy for I/O sites
05/15/2003US20030092253 Method of manufacturing semiconductor device
05/15/2003US20030092252 Chip-like electronic components, a method of manufacturing the same, a pseudo wafer therefor and a method of manufacturing thereof
05/15/2003US20030092247 Process of Fabricating An Anti-Fuse For Avoiding A Key Hole Exposed
05/15/2003US20030092245 Wafer scale molding of protective caps
05/15/2003US20030092240 Method for forming a region of low dielectric constant nanoporous material
05/15/2003US20030092229 Use of protective caps as masks at a wafer scale
05/15/2003US20030092221 Super low profile package with high efficiency of heat dissipation
05/15/2003US20030092220 Stereolithographic methods of fabricating semiconductor devices having protective layers thereon through which contact pads are exposed
05/15/2003US20030092219 Semiconductor device and method of fabricating the same
05/15/2003US20030092218 Deflectable interconnect
05/15/2003US20030092217 Flip chip semiconductor device in a molded chip scale package (CSP) and method of assembly
05/15/2003US20030092216 Method of manufacturing a semiconductor package with a lead frame having a support structure
05/15/2003US20030092215 Copper-based chip attach for chip-scale semiconductor packages
05/15/2003US20030092205 Crack-preventive semiconductor package
05/15/2003US20030092204 Mark configuration, wafer with at least one mark configuration, and a method of producing at least one mark configuration
05/15/2003US20030091870 Method of forming a liner for tungsten plugs
05/15/2003US20030091844 Crosslinked elastic polymer in a photo- or thermally-polymerizable resin
05/15/2003US20030091674 Molding assembly for wafer scale molding of protective caps
05/15/2003US20030091673 Packaging substrate with electrostatic discharge protection
05/15/2003US20030091457 Wherein molybdenum encapsulates copper; may be sintered without copper leakage
05/15/2003US20030091264 Hybrid integration of electrical and optical chips
05/15/2003US20030090915 Inverter apparatus and method of manufacturing the same
05/15/2003US20030090884 Wafer-level chip scale package having stud bump and method for fabricating the same
05/15/2003US20030090883 Component built-in module and method for producing the same
05/15/2003US20030090882 Passive devices and modules for transceiver
05/15/2003US20030090877 Lead frame, resin sealing mold and method for manufacturing a semiconductor device using the same
05/15/2003US20030090876 Module including one or more chips
05/15/2003US20030090875 Electronic assembly having solder thermal interface between a die substrate and a heat spreader
05/15/2003US20030090873 Coolant cooled type semiconductor device
05/15/2003US20030090872 Electronic device substrate assembly with impermeable barrier and method of making
05/15/2003US20030090845 Electrostatic discharge protection for a mixed-voltage device using a stacked-transistor- triggered silicon controlled rectifier
05/15/2003US20030090684 An electron beam emitter, a data storage unit for storing widths of a plurality of test patterns formed on a wafer, calculator for calculating an change in width before and after being irradiated; making semiconductor memory
05/15/2003US20030090612 Liquid crystal display device
05/15/2003US20030090291 Electronic device
05/15/2003US20030090040 Use of infrared radiation in molding of protective caps
05/15/2003US20030090008 First housing encapsulating a semiconductor die, a heat sink is positioned near the first housing and a second housing is formed to encapsulate at least part of the heat sink; synchronous-link dynamic random access memory (SLDRAM)
05/15/2003US20030090007 Housing assembly for an electronic device and method of packaging an electronic device
05/15/2003US20030090006 Underfill and encapsulation of carrier substrate-mounted flip-chip components using stereolithography
05/15/2003US20030090004 Method for manufacturing a low-profile semiconductor device
05/15/2003US20030090002 Semiconductor device and method of manufacturing the same
05/15/2003US20030090001 Wirebonded semiconductor package structure and method of manufacture
05/15/2003US20030090000 Electronic packaging; maintains a constant contact force between mating pads of an LGA connection, and restricts localized bending and plastic flow
05/15/2003US20030089999 Semiconductor devices having stereolithographically fabricated protective layers thereon through which contact pads are exposed and assemblies including the same
05/15/2003US20030089997 Tiedowns connected to kerf regions and edge seals
05/15/2003US20030089996 Electromigration-reliability improvement of dual damascene interconnects
05/15/2003US20030089993 Semiconductor device including titanium wires and manufacturing method therefor
05/15/2003US20030089992 Plasma enhanced chemical vapor deposition in the presence of an inert gas; low dielectric constant; useful in a damascene structure; passivation layer, resistant to moisture
05/15/2003US20030089990 Semiconductor device and method of manufacturing the same
05/15/2003US20030089989 Conductive runner or line having a contact pad with which electrical communication is desired is formed over a substrate outer surface, and a conductive plug is formed laterally proximate the contact pad
05/15/2003US20030089988 Semiconductor device and method of manufacturing the same
05/15/2003US20030089987 Dual damascene structures are formed in a dielectric stack including three dielectric layers; via patterns for these structures have a rectangular shape and are wider than the corresponding overlaying trench patterns
05/15/2003US20030089985 Deflectable interconnect
05/15/2003US20030089984 Multilayer flexible wiring boards
05/15/2003US20030089983 Ball grid array semiconductor package
05/15/2003US20030089981 Semiconductor package having stacked dice and leadframes and method of fabrication
05/15/2003US20030089980 Semiconductor component
05/15/2003US20030089979 Dual chip stack method for electro-static discharge protection of integrated circuits
05/15/2003US20030089978 Memory-module and a method of manufacturing the same
05/15/2003US20030089976 Heat sink with collapse structure and semiconductor package with heat sink
05/15/2003US20030089975 Ceramic substrate for manufacture/inspection of semiconductor
05/15/2003US20030089974 Semiconductor device
05/15/2003US20030089970 Semiconductor package having multi-signal bus bars
05/15/2003US20030089969 Electronic component, semiconductor device, methods of manufacturing the same, circuit board, and electronic instrument
05/15/2003US20030089968 Semiconductor device
05/15/2003US20030089963 Semiconductor device with inductive component and method of making
05/15/2003US20030089962 Fuse element connected to fuse electrodes extending through an insulator layer to an underlying wiring layer, wherein the fuse element is positioned external to the insulator, with a gap between the insulator and fuse element
05/15/2003US20030089957 Heat regulating device for integrated optical devices
05/15/2003US20030089943 BEOL decoupling capacitor
05/15/2003US20030089941 Method for stabilizing or offsetting voltage in an integrated circuit
05/15/2003US20030089940 Capacitor comprising a layer of conductive material having a first portion and a second portion arranged in a pattern relative to one another to provide maximum capacitance per semiconductor die area; e.g. pattern of interleaved combs
05/15/2003US20030089938 Semiconductor device and method of manufacturing the same
05/15/2003US20030089937 Semiconductor device and method for fabricating the same
05/15/2003US20030089936 Structure and method for embedding capacitors in Z-connected multi-chip modules
05/15/2003US20030089928 Semiconductor device
05/15/2003US20030089926 Semiconductor device
05/15/2003US20030089923 Semiconductor device, semiconductor packaging method, assembly and method for fabricating the same
05/15/2003US20030089922 Semiconductor device and method of manufacturing same
05/15/2003US20030089903 Dissolved organosilicon compound and porous forming compound which is decomposed or evaporated by heat treatment
05/15/2003US20030089899 Nanoscale wires and related devices
05/15/2003US20030089868 Semiconductor device manufacturing method and semiconductor device
05/15/2003US20030089635 Latch locking mechanism of a KGD carrier
05/15/2003US20030089524 Resin substrate
05/15/2003US20030089521 Bonding pad(s) for a printed circuit board and a method for forming bonding pad(s)
05/15/2003US20030089490 Heat sink
05/15/2003US20030089487 Cooling apparatus having low profile extrusion and method of manufacture therefor
05/15/2003US20030089486 Cooling apparatus having low profile extrusion and method of manufacture therefor
05/15/2003DE20304140U1 Heat dissipating system for a high power chip such as a cpu blows air though a grid in a thin profile arrangement
05/15/2003DE20303845U1 Cooling system using a fluid cooled heat sink for use with a CPU module
05/15/2003DE10227936C1 Method for making contactless chip card modules comprises stamping out module supports from metal strip, on to which electronic components are fitted and plastic injected
05/15/2003CA2465162A1 Silicon on insulator device with improved heat removal and method of manufacture
05/15/2003CA2464405A1 Large area silicon carbide devices and manufacturing methods therefor
05/15/2003CA2454155A1 Electrically conductive thermal interface
05/14/2003EP1311072A1 Transmitter and receiver module
05/14/2003EP1311032A1 High density connector and method of manufacture
05/14/2003EP1311031A1 High density connector and method of manufacture
05/14/2003EP1311030A1 High density connector and method of manufacture
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