Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
06/2003
06/05/2003WO2002058112A9 Copper diffusion barriers
06/05/2003WO2002054491A3 Cu-pad/bonded/cu-wire with self-passivating cu-alloys
06/05/2003WO2002045166A3 Method for eliminating crack damage at interfaces in integrated circuits
06/05/2003WO2002045142A3 Copper alloy interconnections for integrated circuits and methods of making same
06/05/2003WO2002021241A3 Circuit arrangement and a method for detecting an undesired attack on an integrated circuit
06/05/2003US20030106028 Method for adding redundant vias on VLSI chips
06/05/2003US20030106027 Method for adding redundant vias on VLSI chips
06/05/2003US20030105908 Integrated circuit device having a capacitive coupling element
06/05/2003US20030105610 Method and apparatus for determining dot-mark-forming position of semiconductor wafer
06/05/2003US20030105206 Silicone rubber compositions for the sealing and encapsulation of electric and electroninc parts
06/05/2003US20030104753 Method of making encapsulated display devices
06/05/2003US20030104692 Method of making a semiconductor device that has copper damascene interconnects with enhanced electromigration reliability
06/05/2003US20030104690 Semiconductor device
06/05/2003US20030104689 Manufacturing method of semiconductor device
06/05/2003US20030104687 Temporary chip attach structure with thin films
06/05/2003US20030104686 Semiconductor device and method for manufacturing the same
06/05/2003US20030104685 Electrical and thermal contact for use in semiconductor devices and methods for fabricating the same
06/05/2003US20030104684 Iridium conductive electrode/barrier structure and method for same
06/05/2003US20030104679 Backside metallization on microelectronic dice having beveled sides for effective thermal contact with heat dissipation devices
06/05/2003US20030104660 Semiconductor device
06/05/2003US20030104657 Transfer mold semiconductor packaging processes
06/05/2003US20030104656 Leadframes including offsets extending from a major plane thereof, packaged semiconductor devices including same, and mehtods of designing and fabricating such leadframes
06/05/2003US20030104655 Semiconductor integrated circuit package, semiconductor apparatus provided with a plurality of semiconductor integrated circuit packages, method of inspecting semiconductor integrated circuit package and method of fabricating semiconductor integrated circuit package
06/05/2003US20030104654 Recessed encapsulated microelectronic devices and methods for formation
06/05/2003US20030104653 Recessed encapsulated microelectronic devices and methods for formation
06/05/2003US20030104652 Semiconductor chip package and method of manufacturing same
06/05/2003US20030104651 Low temperature hermetic sealing method having passivation layer
06/05/2003US20030104650 Method for fabricating 3-dimensional solenoid and device fabricated
06/05/2003US20030104647 Selective ionic implantation of fluoropolymer film to modify the sensitivity of underlying sensing capacitors
06/05/2003US20030104186 Ceramic substrate
06/05/2003US20030104183 Wiring board and its production method, semiconductor device and its production method, and electronic apparatus
06/05/2003US20030104120 Immersion deposition of indium or tin on a copper surface; annealing; optional oxidation
06/05/2003US20030103628 Diversification of a single integrated circuit identifier
06/05/2003US20030103340 EMI cancellation circuit embeded in an IC
06/05/2003US20030103339 Image sensor of a quad flat package
06/05/2003US20030103338 Electronic package having multiple-zone interconnects and methods of manufacture
06/05/2003US20030103337 Frame support for a printed board assembly
06/05/2003US20030103333 Device for sealing and cooling multi-chip modules
06/05/2003US20030103332 Heat sink assembly and method
06/05/2003US20030103331 Heat dissipation device
06/05/2003US20030103330 Heat-dissipating module
06/05/2003US20030102887 Increasing decoupling capacitance using preferential shields
06/05/2003US20030102813 Method and apparatus for creating a reliable long RC time constant
06/05/2003US20030102603 Molding of protective caps
06/05/2003US20030102576 Alignment pattern and method of forming the same
06/05/2003US20030102575 Resin-encapsulated semiconductor device and method for manufacturing the same
06/05/2003US20030102574 Semiconductor device
06/05/2003US20030102573 Adhesive film for semiconductor, lead frame and semiconductor device using the same
06/05/2003US20030102572 Integrated assembly protocol
06/05/2003US20030102571 Semiconductor package structure with a heat-dissipation stiffener and method of fabricating the same
06/05/2003US20030102570 Electronic device and a method of manufacturing the same
06/05/2003US20030102569 Method and apparatus for die stacking
06/05/2003US20030102567 Integrated circuit die having bond pads near adjacent sides to allow stacking of dice without regard to dice size
06/05/2003US20030102566 Stereolithographic method for applying materials to electronic component substrates and resulting structures
06/05/2003US20030102565 Semiconductor integrated circuit device and a method of manufacturing the same
06/05/2003US20030102563 Semiconductor power device and method of formation
06/05/2003US20030102561 Semiconductor device and method of production thereof
06/05/2003US20030102560 Wafer level package and method for manufacturing the same
06/05/2003US20030102559 Semiconductor substrate with contact pads; testing device
06/05/2003US20030102556 Semiconductor integrated circuit device
06/05/2003US20030102555 Electronic assembly with sandwiched capacitors and methods of manufacture
06/05/2003US20030102554 Thermoelectric module
06/05/2003US20030102553 Member for electronic circuit, method for manufacturing the member, and electronic part
06/05/2003US20030102552 In-situ cap and method of fabricating same for an integrated circuit device
06/05/2003US20030102551 Semiconductor device and method for manufacturing
06/05/2003US20030102550 Semiconductor device having a signal lead exposed on the undersurface of a sealing resin with an air gap between the signal lead and a mounting substrate
06/05/2003US20030102549 Pin-assignment method for integrated circuit packages to increase the electro-static discharge protective capability thereof
06/05/2003US20030102548 Member for semiconductor package and semiconductor package using the same, and fabrication method thereof
06/05/2003US20030102547 Semiconductor device and production method thereof
06/05/2003US20030102545 Semiconductor device
06/05/2003US20030102544 Semiconductor module and production method therefor and module for IC cards and the like
06/05/2003US20030102543 Resin-molded semiconductor device
06/05/2003US20030102542 Semiconductor device having leadless package structure
06/05/2003US20030102541 Smart card module and method of assembling the same
06/05/2003US20030102540 Method and apparatus for a lead-frame air-cavity package
06/05/2003US20030102539 Tape under frame for lead frame IC package assembly
06/05/2003US20030102538 Leadframe for semiconductor chips and electronic devices and production methods for a leadframe and for electronic devices
06/05/2003US20030102537 Saw singulated leadless plastic chip carrier
06/05/2003US20030102536 Device for shielding transmission lines from ground or power supply
06/05/2003US20030102535 Semiconductor device having a ball grid array and method therefor
06/05/2003US20030102533 Protection of exposed semiconductor chip using thin polymer coatings
06/05/2003US20030102531 Stacked memory cell and process of fabricating same
06/05/2003US20030102530 Semiconductor wafer, method of manufacturing the same and semiconductor device
06/05/2003US20030102526 Backside metallization on sides of microelectronic dice for effective thermal contact with heat dissipation devices
06/05/2003US20030102522 Multilayer structure; metal, dielectric, metal layers
06/05/2003US20030102521 Semiconductor device
06/05/2003US20030102520 Fuse for use in a semiconductor device, and semiconductor devices including the fuse
06/05/2003US20030102517 Semiconductor device with electrically coupled spiral inductors
06/05/2003US20030102509 Esd parasitic bipolar transistors with high resistivity regions in the collector
06/05/2003US20030102506 Circuit configuration
06/05/2003US20030102494 Semiconductor device
06/05/2003US20030102493 Regeneration of a secret quantity from an intergrated circuit identifier
06/05/2003US20030102491 Bilayer silicon carbide based barrier
06/05/2003US20030102489 Power device having multi-chip package structure
06/05/2003US20030102475 Semiconductor devices with bonding pads having intermetal dielectric layer of hybrid configuration and methods of fabricating the same
06/05/2003US20030102474 Semiconductor device for detecting gate defects
06/05/2003US20030102356 Method for producing a heat-conducting connection between two work pieces
06/05/2003US20030102292 Positioning screen; irradiating with lasers; semiconductor
06/05/2003US20030102159 Optimum power and ground bump pad and bump patterns for flip chip packaging
06/05/2003US20030102158 Laminate having plated microvia interconnects and method for forming the same