Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
07/2003
07/08/2003US6590657 Semiconductor structures and manufacturing methods
07/08/2003US6590473 Thin-film bandpass filter and manufacturing method thereof
07/08/2003US6590346 Double-metal background driven displays
07/08/2003US6590297 Semiconductor chip having pads with plural junctions for different assembly methods
07/08/2003US6590296 Semiconductor device with staggered hexagonal electrodes and increased wiring width
07/08/2003US6590295 Microelectronic device with a spacer redistribution layer via and method of making the same
07/08/2003US6590293 Electronic component, having projection electrodes and methods for manufacturing thereof
07/08/2003US6590292 Thermal and mechanical attachment of a heatspreader to a flip-chip integrated circuit structure using underfill
07/08/2003US6590291 Semiconductor device and manufacturing method therefor
07/08/2003US6590290 Stacked via in copper/polyimide BEOL
07/08/2003US6590289 Hexadecagonal routing
07/08/2003US6590288 barrier layer deposition in integrated circuits interconnects.
07/08/2003US6590287 Packaging method and packaging structures of semiconductor devices
07/08/2003US6590286 Land grid array semiconductor device
07/08/2003US6590284 Semiconductor device and method of manufacturing same
07/08/2003US6590283 Method for hermetic leadless device interconnect using a submount
07/08/2003US6590281 Crack-preventive semiconductor package
07/08/2003US6590280 Disk-like gettering unit, integrated circuit, encapsulated semiconductor device, and method for manufacturing the same
07/08/2003US6590279 Dual-chip integrated circuit package and method of manufacturing the same
07/08/2003US6590278 Electronic package
07/08/2003US6590277 Reduced stress LOC assembly
07/08/2003US6590276 Semiconductor device and a method of manufacturing the same
07/08/2003US6590275 Ball grid array type semiconductor package having a flexible substrate
07/08/2003US6590274 Semiconductor wafer and method for manufacturing semiconductor devices
07/08/2003US6590265 Semiconductor device with sidewall spacers having minimized area contacts
07/08/2003US6590264 Hybrid diodes with excellent ESD protection capacity
07/08/2003US6590261 Electrostatic discharge protection structure
07/08/2003US6590258 SIO stacked DRAM logic
07/08/2003US6590257 Semiconductor device and method for manufacturing the same, semiconductor wafer and semiconductor device manufactured thereby
07/08/2003US6590225 Die testing using top surface test pads
07/08/2003US6590157 Sealing structure for highly moisture-sensitive electronic device element and method for fabrication
07/08/2003US6589890 Precleaning process for metal plug that minimizes damage to low-κ dielectric
07/08/2003US6589888 Dual frequency plasma enhanced chemical vapor deposition of silicon carbide layers
07/08/2003US6589887 Forming metal-derived layers by simultaneous deposition and evaporation of metal
07/08/2003US6589885 Semiconductor device and method in which contact hole is filled with silicon having low impurity concentration
07/08/2003US6589874 Method for forming electromigration-resistant structures by doping
07/08/2003US6589867 Method of fabricating a contact structure having a composite barrier layer between a platinum layer and a polysilicon plug
07/08/2003US6589865 Low pressure, low temperature, semiconductor gap filling process
07/08/2003US6589863 Semiconductor device and manufacturing method thereof
07/08/2003US6589862 Lower layer comprises a non-silicon containing organic polymer and an upper layer comprises an organic, silicon containing polymer
07/08/2003US6589860 System and method for calibrating electron beam defect inspection tool
07/08/2003US6589859 Method of manufacturing an electronic power component, and an electronic power component obtained thereby
07/08/2003US6589855 Methods of processing semiconductor wafer and producing IC card, and carrier
07/08/2003US6589852 Method of replicating alignment marks for semiconductor wafer photolithography
07/08/2003US6589851 Semiconductor processing methods of forming a conductive grid
07/08/2003US6589837 Buried contact structure in semiconductor device and method of making the same
07/08/2003US6589833 ESD parasitic bipolar transistors with high resistivity regions in the collector
07/08/2003US6589820 Method and apparatus for packaging a microelectronic die
07/08/2003US6589819 Microelectronic packages having an array of resilient leads and methods therefor
07/08/2003US6589817 Semiconductor device, method for manufacturing the same, and method for mounting the same
07/08/2003US6589815 Method of manufacturing semiconductor device with plated heat sink by laser cutting
07/08/2003US6589814 Lead frame chip scale package
07/08/2003US6589813 Chip size stack package and method of fabricating the same
07/08/2003US6589812 Pre-applied adhesion promoter
07/08/2003US6589810 BGA package and method of fabrication
07/08/2003US6589801 Wafer-scale production of chip-scale semiconductor packages using wafer mapping techniques
07/08/2003US6589712 Method for forming a passivation layer using polyimide layer as a mask
07/08/2003US6589447 Forming pattern without using resist coating
07/08/2003US6589414 Electrodepositing material on substrate and selective conversion of conductive portion by exposure to nitrogen-containing plasma; chromium-nitride-comprising diffusion barrier; semiconductors
07/08/2003US6589385 Resist mask for measuring the accuracy of overlaid layers
07/08/2003US6589384 Solventless laminating adhesive with barrier properties
07/08/2003US6589310 For use in microelectronic packages; improved thermal conductivity and low porosity; weight ratio of sintering aid and phosphorus additives
07/08/2003US6589059 Chip socket assembly and chip file assembly for semiconductor chips
07/08/2003US6588949 Method and apparatus for hermetically sealing photonic devices
07/08/2003US6588854 Nonlot based method for assembling integrated circuit devices
07/08/2003US6588647 Liquid cooled circuit device and a manufacturing method thereof
07/08/2003US6588498 Thermosiphon for electronics cooling with high performance boiling and condensing surfaces
07/08/2003US6588497 System and method for thermal management by synthetic jet ejector channel cooling techniques
07/08/2003US6588217 Thermoelectric spot coolers for RF and microwave communication integrated circuits
07/08/2003US6588097 Method of manufacturing multilayered ceramic substrate and green ceramic laminate
07/08/2003CA2104374C Method for continuous assembly of patterned strips and integrated circuit micromodule obtained by said method
07/03/2003WO2003054959A2 Circuit arrangement comprising electronic components on a nonconducting supporting substrate
07/03/2003WO2003054958A1 Carbon nanotube thermal interface structures
07/03/2003WO2003054957A2 Electronic component and method for producing the same
07/03/2003WO2003054956A1 Chip and wafer integration process using vertical connections
07/03/2003WO2003054928A2 Porous low-k dielectric interconnect structures
07/03/2003WO2003054927A2 Structure and process for packaging rf mems and other devices
07/03/2003WO2003028099A3 Arrangement of vias in a substrate to support a ball grid array
07/03/2003WO2002084737A3 Arrangement and method of arrangement of stacked dice in an integrated electronic device
07/03/2003WO2002080273A3 Alternate bump metallurgy bars for power and ground routing
07/03/2003WO2002069398A3 Encapsulated die package with improved parasitic and thermal performance
07/03/2003WO2002056364A8 Conductor reservoir volume for integrated circuit interconnects
07/03/2003WO1999065062A3 Ic stack utilizing secondary leadframes
07/03/2003US20030126578 Topological global routing for automated IC package interconnect
07/03/2003US20030126574 Integrated circuit with layout matched high speed lines
07/03/2003US20030126573 Integrated circuit with layout matched high speed lines
07/03/2003US20030125418 For sealing material for electronic parts, fillers, finishes, and aggregates incorporated into refractory, glass, ceramic, or composite; wear resistance
07/03/2003US20030125077 Multimedia watch
07/03/2003US20030124892 Electrostatic protection cover
07/03/2003US20030124870 Forming low k dielectric layers
07/03/2003US20030124868 Pattern forming method
07/03/2003US20030124860 Method for forming metal lines of semiconductor device
07/03/2003US20030124846 Multi-step process for depositing copper seed layer in a via
07/03/2003US20030124840 Material deposition from a liquefied gas solution
07/03/2003US20030124835 Integrated chip package structure using silicon substrate and method of manufacturing the same
07/03/2003US20030124833 Bump fabrication process
07/03/2003US20030124832 Method of making a bump on a substrate without ribbon residue
07/03/2003US20030124830 Semiconductor integrated circuit device and manufacturing method of that
07/03/2003US20030124829 Interconnection method entailing protuberances formed by melting metal over contact areas
07/03/2003US20030124816 Semiconductor wafer with grouped integrated circuit die having inter-die connections for group testing