Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 23 - Details of semiconductor or other solid state devices
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
07/2003
07/22/2003US6596559 Flip-chip package with optimized encapsulant adhesion and method
07/22/2003US6596552 Test photomask and method for investigating ESD-induced reticle defects
07/22/2003US6596549 Automatic wiring method for semiconductor package enabling design of high-speed wiring for semiconductor package with reduced labor
07/22/2003US6596382 Multilayered board and method for fabricating the same
07/22/2003US6596139 Discontinuous high-modulus fiber metal matrix composite for physical vapor deposition target backing plates and other thermal management applications
07/22/2003US6596052 Ultrafine nickel powder
07/22/2003US6595787 Low cost integrated out-of-plane micro-device structures and method of making
07/22/2003US6595784 Interposer member having apertures for relieving stress and increasing contact compliancy
07/22/2003US6595275 Heat sink assembly
07/22/2003US6595270 Using micro heat pipes as heat exchanger unit for notebook applications
07/22/2003US6595269 Flexible heat pipe structure and associated methods for dissipating heat in electronic apparatus
07/22/2003US6595050 Wire bonded sensor and method for manufacturing wire bonded sensor
07/22/2003US6595014 Spray cooling system with cooling regime detection
07/22/2003US6594916 Highly moisture-sensitive electronic device element and method for fabrication utilizing vent holes or gaps
07/22/2003US6594891 Process for forming multi-layer electronic structures
07/22/2003US6594889 Method for processing leadframe
07/17/2003WO2003058812A1 Method for the hermetic encapsulation of a component
07/17/2003WO2003058810A1 Encapsulated component which is small in terms of height and method for producing the same
07/17/2003WO2003058724A1 A thin film transistor array panel and a method for manufacturing the same
07/17/2003WO2003058718A1 Memory device packaging including stacked passive devices and method for making the same
07/17/2003WO2003058717A2 Package for a non-volatile memory device including integrated passive devices and method for making the same
07/17/2003WO2003058716A1 Discrete semiconductor component
07/17/2003WO2003058715A1 Integrated passive devices formed by demascene processing
07/17/2003WO2003058714A2 Device and method for package warp compensation in an integrated heat spreader
07/17/2003WO2003058713A2 Chip module for chip cards
07/17/2003WO2003058712A2 Method for assigning power and ground pins in array packages to enhance next level routing
07/17/2003WO2003058705A1 Evaluation circuit for an anti-fuse
07/17/2003WO2003058704A1 Method for producing a protection for chip edges and system for the protection of chip edges
07/17/2003WO2003058696A1 Method of producing metal film
07/17/2003WO2003058655A1 Material deposition from a liquefied gas solution
07/17/2003WO2003058332A1 Reflection type liquid crystal display device and method of manufacturing the same
07/17/2003WO2003058256A1 Method and apparatus for detecting bearing failure
07/17/2003WO2003058104A1 Circuit package and method for making the same
07/17/2003WO2003057795A1 Use of paraffin-containing powders as phase-change materials (pcm) in polymer composites in cooling devices
07/17/2003WO2003057782A1 Chain extension for thermal materials
07/17/2003WO2003057779A1 Electroconductive resin composition
07/17/2003WO2003057755A1 Organic composition
07/17/2003WO2003057475A1 Improved thermal interface material
07/17/2003WO2002093644A3 Heat exchanger
07/17/2003WO2002080269A3 Method and structure for ex-situ polymer stud grid array contact formation
07/17/2003WO2002039463A3 Methods and system for attaching substrates using solder structures
07/17/2003US20030134510 Methods of forming metal layers in integrated circuit devices using selective deposition on edges of recesses and conductive contacts so formed
07/17/2003US20030134508 Controlled conformality with alternating layer deposition
07/17/2003US20030134507 Semiconductor device fabricating method and treating liquid
07/17/2003US20030134505 Fine-pitch device lithography using a sacrificial hardmask
07/17/2003US20030134503 Methods of forming materials between conductive electrical components, and insulating materials
07/17/2003US20030134499 Bilayer HDP CVD / PE CVD cap in advanced BEOL interconnect structures and method thereof
07/17/2003US20030134498 Method and apparatus for pretreating a substrate prior to electroplating
07/17/2003US20030134497 Metal foil for wiring formation comprising copper, aluminum, nickel or alloy; accuracy
07/17/2003US20030134496 Method of making a wafer level chip scale package
07/17/2003US20030134495 Integration scheme for advanced BEOL metallization including low-k cap layer and method thereof
07/17/2003US20030134464 Semiconductor device and method for the manufacture thereof
07/17/2003US20030134457 Semiconductor device capable of preventing moisture absorption of fuse area thereof and method for manufacturing the fuse area
07/17/2003US20030134456 Semiconductor fuses, methods of using the same, methods of making the same, and semiconductor devices containing the same
07/17/2003US20030134455 Method of forming IC package having upward-facing chip cavity
07/17/2003US20030134454 Apparatus and method for containing excess thermal interface material
07/17/2003US20030134453 Process and structure improvements to shellcase style packaging technology
07/17/2003US20030134452 Method for manufacturing semiconductor device packages
07/17/2003US20030134450 Elimination of RDL using tape base flip chip on flex for die stacking
07/17/2003US20030134442 Test structure and method for flash memory tunnel oxide quality
07/17/2003US20030134437 Method of fabricating a thin and fine ball-grid array package with embedded heat spreader
07/17/2003US20030134233 Protecting a semiconductor process wafer surface from contacting thermally degraded photoresist comprising the steps of: providing a semiconductor process wafer having a process surface; forming protective layer over selected areas
07/17/2003US20030134039 Reduction of dielectric constant of chemical vapor deposited films which are useful for production of microelectronic devices
07/17/2003US20030133339 Interconnected high speed electron tunneling devices
07/17/2003US20030133279 High-frequency wiring board
07/17/2003US20030133276 Arrangements to improve noise immunity of differential signals
07/17/2003US20030133275 Printed circuit board with a built-in passive device, manufacturing method of the printed circuit board, and elemental board for the printed circuit board
07/17/2003US20030133274 Integrated circuit package and method of manufacture
07/17/2003US20030133264 Heat sink
07/17/2003US20030133258 Voltage control device for vehicular alternator
07/17/2003US20030133249 Electronic component and method for manufacturing the same
07/17/2003US20030133248 Structure for eliminating electromagnetic interference caused by central processing unit
07/17/2003US20030133237 Power-rail electrostatic discharge protection circuit with a dual trigger design
07/17/2003US20030132821 Electronic device
07/17/2003US20030132777 Apparatus for protecting an integrated circuit formed in a substrate and method for protecting the circuit against reverse engineering
07/17/2003US20030132771 IC socket and spring means of IC socket
07/17/2003US20030132766 Wire-bond process flow for copper metal-six, structures achieved thereby, and testing method
07/17/2003US20030132533 Semiconductor device, method of manufacturing semiconductor device and a method of manufacturing lead frame
07/17/2003US20030132532 Semiconductor device having a wire laid between pads
07/17/2003US20030132531 Surface mounted package with die bottom spaced from support board
07/17/2003US20030132530 Semiconductor device having radiation structure and method for manufacturing semiconductor device having radiation structure
07/17/2003US20030132529 Enhanced chip scale package for flip chips
07/17/2003US20030132528 Method and apparatus for flip chip device assembly by radiant heating
07/17/2003US20030132526 Semiconductor device having a contact window and fabrication method thereof
07/17/2003US20030132525 Semiconductor device and its manufacturing method
07/17/2003US20030132523 Wiring line and manufacture process thereof and semiconductor device and manufacturing process thereof
07/17/2003US20030132520 Semiconductor device and mounting method
07/17/2003US20030132519 Array structure of solder balls able to control collapse
07/17/2003US20030132518 Ball grid substrate for lead-on-chip semiconductor package
07/17/2003US20030132516 Semiconductor device and manufacturing method thereof
07/17/2003US20030132515 Structure of a pin platform for integrated circuit
07/17/2003US20030132514 Non-evaporable getter material disposed on same substrate as active transistors and other logic; includes layer of non-evaporable getter material disposed on dielectric layer, vacuum device disposed on substrate
07/17/2003US20030132513 Semiconductor package device and method
07/17/2003US20030132512 Lead frame for semiconductor device
07/17/2003US20030132511 Stamped lead members, drain pads, source pads, gate runner, and MOSFET, isolated gate bipolar transistor positioned between ceramic substrate members; layers of solderable copper material directly bonded to inner and outer surfaces
07/17/2003US20030132510 Advanced BEOL interconnect structures with low-k PE CVD cap layer and method thereof
07/17/2003US20030132504 Structures and methods of anti-fuse formation in SOI
07/17/2003US20030132503 Fuse structure
07/17/2003US20030132497 Microelectronic fabrication with corrosion inhibited bond pad
07/17/2003US20030132494 Magnetic shield for integrated circuit packaging
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