Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 23 - Details of semiconductor or other solid state devices
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
08/2003
08/05/2003US6603163 Semiconductor device with capacitor and method of manufacturing thereof
08/05/2003US6603162 Semiconductor integrated circuit device including dummy patterns located to reduce dishing
08/05/2003US6603154 Semiconductor package and method of manufacturing semiconductor package
08/05/2003US6603148 Semiconductor device
08/05/2003US6603145 High temperature circuit apparatus
08/05/2003US6603142 Antifuse incorporating tantalum nitride barrier layer
08/05/2003US6603071 Flexible printed circuit board, integrated circuit chip mounting flexible printed circuit board, display apparatus incorporating, integrated circuit chip mounted structure, and bonding method of integrated circuit chip mounting flexible printed circuit board
08/05/2003US6602804 Dielectric, polymer blend
08/05/2003US6602803 Direct attachment semiconductor chip to organic substrate
08/05/2003US6602802 Method of forming a porous film on a substrate
08/05/2003US6602801 Method for forming a region of low dielectric constant nanoporous material
08/05/2003US6602788 Forming barrier layer; then aluminum, germanium, copper alloy
08/05/2003US6602785 Method of forming a conductive contact on a substrate and method of processing a semiconductor substrate using an ozone treatment
08/05/2003US6602782 Methods for forming metal wiring layers and metal interconnects and metal interconnects formed thereby
08/05/2003US6602778 Apparatus and methods for coupling conductive leads of semiconductor assemblies
08/05/2003US6602776 Method and system for providing a polysilicon stringer monitor
08/05/2003US6602775 Method to improve reliability for flip-chip device for limiting pad design
08/05/2003US6602773 Methods of fabricating semiconductor devices having protected plug contacts and upper interconnections
08/05/2003US6602748 Method for fabricating a semiconductor device
08/05/2003US6602746 Dual-gate CMOS semiconductor device manufacturing method
08/05/2003US6602740 Encapsulation of microelectronic assemblies
08/05/2003US6602739 Method for making multichip module substrates by encapsulating electrical conductors and filling gaps
08/05/2003US6602738 Method of manufacturing semiconductor device having tie bars for interconnecting leads
08/05/2003US6602737 Multilayer; joining solder zones to heat exchanger
08/05/2003US6602735 Method of fabricating a semiconductor chip package with a lead frame and multiple integrated circuit chips
08/05/2003US6602734 Method of manufacturing a semiconductor device
08/05/2003US6602733 Method for fabricating electronic circuit device, semiconductor device and electronic circuit device including bump bonding
08/05/2003US6602732 Method for mounting a semiconductor chip on a substrate and semiconductor device adapted for mounting on a substrate
08/05/2003US6602730 Method for gravitation-assisted control of spread of viscous material applied to a substrate
08/05/2003US6602729 Pulse voltage breakdown (VBD) technique for inline gate oxide reliability monitoring
08/05/2003US6602723 Method of integrating scatterometry metrology structures directly into die design
08/05/2003US6602623 Strontium, magnesium, silicon, aluminum, boron and alkali metal oxide; degreasing; low dielectric constant and loss; high thermal expansion
08/05/2003US6602616 Multilayer; layers of varrious dielectric
08/05/2003US6602595 Ink comprising: a non-stoichiometric non-equilibrium nanostructured material; device such as electronics using such a material
08/05/2003US6602543 Nanotechnology for magnetic components
08/05/2003US6602446 Electrically conductive filler and a heating element adapted to generate heat on electromagnetic induction compounded with resin
08/05/2003US6602439 Controlled particle size
08/05/2003US6602431 Enhancements in sheet processing and lead formation
08/05/2003US6602430 Methods for finishing microelectronic device packages
08/05/2003US6601753 Void-free die attachment method with low melting metal
08/05/2003US6601643 Flat evaporator
08/05/2003US6601641 Oil cooled multistage depressed collector high power amplifier
08/05/2003US6601453 Pressure detecting apparatus
08/05/2003US6601390 Method and apparatus for converting dissipated heat to work energy
08/05/2003US6601314 Method of manufacturing alignment mark
08/05/2003US6601295 Method of producing chip-type electronic devices
08/05/2003US6601294 Method for making a packaged semiconductor device
08/05/2003US6601293 Method of making an electromagnetic interference shield device
08/05/2003CA2255441C Package for semiconductor power device and method for assembling the same
07/2003
07/31/2003WO2003063568A1 Thermally enhanced interposer and method
07/31/2003WO2003063348A2 On-chip multilayer metal shielded transmission line
07/31/2003WO2003063248A1 Semiconductor die package with semiconductor die having side electrical connection
07/31/2003WO2003063246A2 Rf amplifier
07/31/2003WO2003063245A2 Process condition sensing wafer and data analysis system
07/31/2003WO2003063244A1 Integrated circuit arrangement
07/31/2003WO2003063243A1 Thin films, structures having thin films, and methods of forming thin films
07/31/2003WO2003063241A2 Method and apparatus for high heat flux heat transfer
07/31/2003WO2003063240A2 Cooling device
07/31/2003WO2003063239A2 Method and apparatus for controlling die attach fillet height to reduce die shear stress
07/31/2003WO2003063238A1 High-frequency module and its manufacturing method
07/31/2003WO2003063237A1 Substrate for high-frequency module and high-frequency module
07/31/2003WO2003063236A1 Semiconductor device with co-packaged die
07/31/2003WO2003063232A1 Module device
07/31/2003WO2003063231A1 Package part and method of manufacturing the part
07/31/2003WO2003063225A2 Dielectric films for narrow gap-fill applications
07/31/2003WO2003063211A1 Apparatus incorporating small-feature-size and large-feature-size components and method for making same
07/31/2003WO2003063205A2 Poly(organosiloxane) materials and methods for hybrid organic-inorganic dielectrics for integrated circuit applications
07/31/2003WO2003062136A2 Method and system for locally connecting microstructures
07/31/2003WO2003041166A3 Substrate design and process for reducing electromagnetic emission
07/31/2003WO2003040852A3 Concept for compensating external disturbance variables on physical functional parameters in integrated circuits
07/31/2003WO2003038896A3 Ball grid array with x-ray alignment mark
07/31/2003WO2003025976A3 Embedded inductor for semiconductor device circuit
07/31/2003WO2003015165A3 Electronic component with a plastic housing and method for production thereof
07/31/2003WO2003009379A3 Semiconductive device and method of formation
07/31/2003WO2002099877A3 Enhanced performance surface mount semiconductor package devices and methods
07/31/2003WO2002082539A3 A radio frequency (rf) device and its method of manufacture
07/31/2003WO2002078086A3 Power transistor package with integrated flange for surface mount heat removal
07/31/2003WO2002065542A3 Underfill compositions
07/31/2003WO2002011203A3 Plastic encapsulated semiconductor devices with improved corrosion resistance
07/31/2003US20030145292 System and method for product yield prediction
07/31/2003US20030144414 Epoxy-resin systems, which are resistant to aging, moulding materials, components produced therefrom and the use thereof
07/31/2003US20030144381 A curable blends comprising epoxy resin, acid anhydride, phenolic resin curing agent, and fine particles for use in liquid crystal displays, electroluminescence displays, plasma displays, charge coupled devices and semiconductors
07/31/2003US20030144134 Method for the fabrication of an electrocatalyst layer
07/31/2003US20030143958 Integrated power and cooling architecture
07/31/2003US20030143872 Ball grid array connection device
07/31/2003US20030143865 Ultralow dielectric constant material as an intralevel or interlevel dielectric in a semiconductor device and electronic device made
07/31/2003US20030143850 Method for controlling and monitoring a chemical mechanical polishing process
07/31/2003US20030143847 Method of forming low dielectric constant insulating layer and method of manufacturing semiconductor device
07/31/2003US20030143843 Method of forming a copper wiring in a semiconductor device
07/31/2003US20030143839 Sealing porous structures
07/31/2003US20030143838 Interconnect structures in a semiconductor device and processes of formation
07/31/2003US20030143832 Dielectric between metal structures and method therefor
07/31/2003US20030143831 Apparatus and method for inter-chip or chip-to-substrate connection with a sub-carrier
07/31/2003US20030143830 Method of improving copper interconnect of semiconductor devices for bonding
07/31/2003US20030143829 Assembly and method for modified bus bar with Kapton™ tape or insulative material on LOC packaged part
07/31/2003US20030143819 Method of producing semiconductor chips with a chip edge guard, in particular for wafer level packaging chips
07/31/2003US20030143816 Integrated circuit having SiC layer
07/31/2003US20030143781 Encapsulated integrated circuit package and method of manufacturing an integrated circuit package
07/31/2003US20030143780 Method and apparatus for manufacture and inspection of semiconductor device
07/31/2003US20030143779 Semiconductor device and method for manufacturing the same
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