Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
07/2003
07/15/2003US6593654 Semiconductor device and method for manufacturing same
07/15/2003US6593653 Low leakage current silicon carbonitride prepared using methane, ammonia and silane for copper diffusion barrier, etchstop and passivation applications
07/15/2003US6593652 Semiconductor device reinforced by a highly elastic member made of a synthetic resin
07/15/2003US6593650 Plasma induced depletion of fluorine from surfaces of fluorinated low-k dielectric materials
07/15/2003US6593649 Methods of IC rerouting option for multiple package system applications
07/15/2003US6593648 Semiconductor device and method of making the same, circuit board and electronic equipment
07/15/2003US6593647 Semiconductor device
07/15/2003US6593646 Dual die memory
07/15/2003US6593645 Three-dimensional system-on-chip structure
07/15/2003US6593644 System of a package fabricated on a semiconductor or dielectric wafer with wiring on one face, vias extending through the wafer, and external connections on the opposing face
07/15/2003US6593643 Semiconductor device lead frame
07/15/2003US6593632 Interconnect methodology employing a low dielectric constant etch stop layer
07/15/2003US6593631 Method of fabricating semiconductor device
07/15/2003US6593622 Power mosfet with integrated drivers in a common package
07/15/2003US6593590 Electrical measuring instruments comprising substrates, chips, transistors used for detection of leakage currents in electronic apparatus
07/15/2003US6593545 Laser defined pads for flip chip on leadframe package fabrication method
07/15/2003US6593542 UV laser system and method for single pulse severing of IC fuses
07/15/2003US6593527 Integrated circuit assembly with bar bond attachment
07/15/2003US6593252 Film deposition method and apparatus
07/15/2003US6593250 Fabrication method of semiconductor device using low-k film
07/15/2003US6593247 Method of depositing low k films using an oxidizing plasma
07/15/2003US6593237 Method for manufacturing a low dielectric constant stop layer for integrated circuit interconnects
07/15/2003US6593235 Semiconductor device with a tapered hole formed using multiple layers with different etching rates
07/15/2003US6593233 Semiconductor device and method for manufacturing the same
07/15/2003US6593226 Method for adding features to a design layout and process for designing a mask
07/15/2003US6593222 Method to improve the reliability of thermosonic gold to aluminum wire bonds
07/15/2003US6593221 Selective passivation of exposed silicon
07/15/2003US6593220 Elastomer plating mask sealed wafer level package method
07/15/2003US6593219 Method for fabricating electrode structure and method for fabricating semiconductor device
07/15/2003US6593201 Monolithic inductance-enhancing integrated circuits, complementary metal oxide semiconductor (CMOS) inductance-enhancing integrated circuits, inductor assemblies, and inductance-multiplying methods
07/15/2003US6593200 Method of forming an integrated inductor and high speed interconnect in a planarized process with shallow trench isolation
07/15/2003US6593183 Semiconductor processing method using a barrier layer
07/15/2003US6593172 Design and processing of antifuse structure
07/15/2003US6593171 Stereolithographic methods for fabricating hermetic semiconductor device packages and semiconductor devices including stereolithographically fabricated hermetic packages
07/15/2003US6593169 Method of making hybrid integrated circuit device
07/15/2003US6593168 Method and apparatus for accurate alignment of integrated circuit in flip-chip configuration
07/15/2003US6593157 Early response to plasma/charging damage by special pattern design of active region
07/15/2003US6593155 Method for determination of cure and oxidation of spin-on dielectric polymers
07/15/2003US6592973 Card and process for producing the card
07/15/2003US6592943 Stencil and method for depositing solder
07/15/2003US6592810 High strength, low expansion
07/15/2003US6592780 Using epoxy resin
07/15/2003US6592433 Method for defect reduction
07/15/2003US6592380 Connector module for integrated circuit device, and integrated circuit device suitable for use with the same
07/15/2003US6592019 Pillar connections for semiconductor chips and method of manufacture
07/15/2003US6591898 Integrated heat sink system for a closed electronics container
07/15/2003US6591897 High performance pin fin heat sink for electronics cooling
07/15/2003US6591653 Production method of multi-gauge strips
07/15/2003US6591491 Method for producing multilayer circuit board
07/15/2003CA2195038C Integrated circuit packaging structure
07/10/2003WO2003056889A1 Connection substrate, multilayer wiring board using the connection substrate, substrate for semiconductor package, semiconductor package, and methods for manufacturing them
07/10/2003WO2003056632A1 Cooled photodetector
07/10/2003WO2003056626A1 Ebullition cooling device for heat generating component
07/10/2003WO2003056625A2 Wirebond structure and method of wire bonding a microelectronic die
07/10/2003WO2003056613A1 Semiconductor device and method for fabricating the same
07/10/2003WO2003056612A1 Method of forming copper interconnections for semiconductor integrated circuits on a substrate
07/10/2003WO2003056603A2 Self-ionized and inductively-coupled plasma for sputtering and resputtering
07/10/2003WO2003055803A2 Particulate alumina, method for producing particulate alumina and composition containing particulate alumina
07/10/2003WO2003034492A3 Apparatus and methods for semiconductor ic failure detection
07/10/2003WO2003030217A3 Metal-to-metal antifuse employing carbon-containing antifuse material
07/10/2003WO2003012841A3 Semiconductor structures and devices not lattice matched to the substrate
07/10/2003WO2003007372A3 Cooling apparatus for electronic devices
07/10/2003WO2002095822A3 Method for packaging a microelectronic device using on-die bond pad expansion
07/10/2003WO2002067315A3 Processes of forming thermal transfer materials, and thermal transfer materials
07/10/2003WO2002013261A3 Heat spreading die cover
07/10/2003US20030131322 Integrated circuit with layout matched high speed lines
07/10/2003US20030130114 Method for the deposition of an electrocatalyst layer
07/10/2003US20030129951 Methods of operating microelectronic devices, and methods of providing microelectronic devices
07/10/2003US20030129863 Electronic package with thermally conductive standoff
07/10/2003US20030129841 Forming a structure on a wafer
07/10/2003US20030129836 Semiconductor device and manufacturing method therefor
07/10/2003US20030129832 Method of forming a wiring film
07/10/2003US20030129831 Asymmetric, double-sided self-aligned silicide and method of forming the same
07/10/2003US20030129829 Three-dimensional integrated semiconductor devices
07/10/2003US20030129827 Method of depositing dielectric materials in damascene applications
07/10/2003US20030129825 Method for forming multi-layer metal line of semiconductor device
07/10/2003US20030129822 Cylindrical bonding structure and method of manufacture
07/10/2003US20030129819 Method for fabricating an anti-fuse in programmable interconnections
07/10/2003US20030129814 Method of manufacturing semiconductor device
07/10/2003US20030129789 Method of assembling a semiconductor chip package
07/10/2003US20030129787 Stereolithographic methods for fabricating hermetic semiconductor device packages and semiconductor devices including stereolithographically fabricated hermetic packages
07/10/2003US20030129786 Method for fabricating Si-Al alloy packaging material
07/10/2003US20030129783 Integrated circuit device having a built-in thermoelectric cooling mechanism
07/10/2003US20030129774 Advanced process control (APC) of copper thickness for chemical mechanical planarization (CMP) optimization
07/10/2003US20030129352 Method for cooling electronic components and thermally conductive sheet for use therewith
07/10/2003US20030129347 Curing a silicone polymer while the polymer lies between backing materials and the backing material has a surface containing oxygen and/or sulfur atoms in contact with silicon, separating the cured product from backing material
07/10/2003US20030129271 Package stack via bottom-leaded plastic (BLP) packaging
07/10/2003US20030128605 Method of making identification code of ROM and structure thereof
07/10/2003US20030128602 Semiconductor device and a method of manufacturing the same
07/10/2003US20030128576 High voltage switch circuitry
07/10/2003US20030128526 Multilayer ceramic electronic component and manufacturing method thereof
07/10/2003US20030128523 Semiconductor stack; heat exchanging
07/10/2003US20030128522 Radio frequency module
07/10/2003US20030128521 Heat exchangers for integrated circuit pakaging comprising silicone oils and fillers as thermoconductive interfaces
07/10/2003US20030128520 Packaging structure with heat slug
07/10/2003US20030128518 Common heatsink for multiple chips and modules
07/10/2003US20030128513 Low profile equipment housing with angular fan
07/10/2003US20030128326 Image display and manufacturing method thereof
07/10/2003US20030128322 Liquid crystal display device
07/10/2003US20030128080 Wire bond-less electronic component for use with an external circuit and method of manufacture