Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 23 - Details of semiconductor or other solid state devices
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
12/2013
12/24/2013US8614463 Layout configuration for memory cell array
12/24/2013US8614270 Resin composition and semiconductor device produced by using the same
12/24/2013US8614109 Semiconductor light-emitting apparatus and method of fabricating the same
12/24/2013US8614108 Electronic device having thermally managed electron path and method of thermal management of very cold electrons
12/24/2013US8614107 Liner-free tungsten contact
12/24/2013US8614106 Liner-free tungsten contact
12/24/2013US8613997 Laminated glazing panel
12/24/2013DE112012001490T5 Gestapelte Durchkontaktstruktur für Metallsicherungsanwendungen Stacked via pattern for metal backup applications
12/24/2013DE112011104502T5 Multichip-Montageeinheit mit einem Substrat mit mehreren vertikal eingebetteten Plättchen und Verfahren zur Herstellung derselben Multi-chip mounting unit comprising a substrate having a plurality of vertically embedded platelets and methods of making the same
12/24/2013DE112009004795B4 Verwirbelungselement und Verfahren zu dessen Herstellung Vortex element and process for its preparation
12/24/2013DE112008000743B4 Leistungsmodul und Wechselrichter für Fahrzeuge Power module and inverter for vehicles
12/24/2013DE112006001177B4 Thermisches Schnittstellenmaterial, Verfahren und System Thermal interface material, method and system
12/24/2013DE10344631B4 Elektronische Schaltungsanordnung Electronic circuitry
12/24/2013DE102013211836A1 Elektrische vorrichtung und verfahren zu ihrer herstellung The electrical apparatus and process for their preparation
12/24/2013DE102013211553A1 Monitorstrukturen und verfahren zu ihrer bildung Monitor structures and procedures for their education
12/24/2013DE102013106459A1 Elektrothermische Kühlvorrichtungen und Verfahren zu ihrer Herstellung Electrothermal cooling devices and processes for their preparation
12/24/2013DE102013106309A1 Vorrichtungskontakt, Gehäuse einer elektrischen Vorrichtung und Verfahren zur Herstellung eines Gehäuses einer elektrischen Vorrichtung Contact device, the housing of an electrical device and method of manufacturing a housing of an electrical device
12/24/2013DE102013106299A1 Chipanordnungen und ein Verfahren zum Ausbilden einer Chipanordnung Chip assemblies, and a method of forming a chip assembly
12/24/2013DE102013105995A1 Elektronisches-Bauelemente-Package und Verfahren zur Herstellung eines Elektronisches-Bauelemente-Package The electronic components package and method for producing a electronic-components-Package
12/24/2013DE102012210480A1 Verfahren zum Herstellen eines Bauelements mit einer elektrischen Durchkontaktierung A method of manufacturing a device having an electrical plated-through hole
12/24/2013DE102012210472A1 Verfahren zum Herstellen eines Bauelements mit einer elektrischen Durchkontaktierung A method of manufacturing a device having an electrical plated-through hole
12/24/2013DE102012003520B4 Anschlusselement für eine auf einer Platine angeordnete lichtemittierende Diode (LED) Connection element for a printed circuit board disposed on a light emitting diode (LED)
12/24/2013DE102011079508B4 Kühlstruktur für ein Halbleiterelement The cooling structure for a semiconductor element
12/24/2013DE102011015162B4 Hohe Ströme führende Metallleitbahn für Halbleiterbauelemente High currents leading Metallleitbahn for semiconductor devices
12/24/2013DE102010003533B4 Substratanordnung, Verfahren zur Herstellung einer Substratanordnung, Verfahren zur Herstellung eines Leistungshalbleitermoduls und Verfahren zur Herstellung einer Leistungshalbleitermodulanordnung Substrate assembly process for the preparation of a substrate assembly, method for producing a power semiconductor module and method of producing a power semiconductor module assembly
12/24/2013DE102009029644B4 Halbleiterbauelementanordnung zur Reduzierung von Querströmen in einem Halbleiterkörper A semiconductor device assembly for the reduction of shunt current in a semiconductor body
12/20/2013DE202013102632U1 Sensorbaustein Sensor module
12/19/2013WO2013188156A1 Method for applying a final metal layer for wafer level packaging and associated device
12/19/2013WO2013187298A1 Heat dissipation structure
12/19/2013WO2013187244A1 Temporary adhesive for semiconductor device production, adhesive supporting body using same, and method for producing semiconductor device using same
12/19/2013WO2013187187A1 Semiconductor device
12/19/2013WO2013187117A1 High frequency module
12/19/2013WO2013186982A1 Film wiring board and light emitting apparatus
12/19/2013WO2013186267A1 Mounting carrier and method for mounting a mounting carrier on a connecting carrier
12/19/2013WO2013185965A1 Composite component and method for producing a composite component
12/19/2013WO2013185839A1 Method for producing an optoelectronic semiconductor device comprising a connecting layer sintered under the action of heat, pressure and ultrasound
12/19/2013WO2013185605A1 Alignment mark and fabrication method thereof
12/19/2013WO2013185407A1 Display panel and manufacturing method thereof
12/19/2013WO2013128341A3 Wire arrangement for an electronic circuit and method of manufacturing the same
12/19/2013WO2013124678A3 Heterodyne detection system and method
12/19/2013WO2013016130A3 A reactive hot-melt adhesive for use on electronics
12/19/2013US20130337609 Lead frame land grid array with routing connector trace under unit
12/19/2013US20130335288 Semiconductor package having a metal paint layer
12/19/2013US20130334714 Integrated circuit packaging system with warpage prevention mechanism and method of manufacture thereof
12/19/2013US20130334712 A method for manufacturing a chip package, a method for manufacturing a wafer level package, a chip package and a wafer level package
12/19/2013US20130334711 Copper Feature Design for Warpage Control of Substrates
12/19/2013US20130334710 Contact and Method of Formation
12/19/2013US20130334709 Stacked semiconductor device and manufacturing method thereof
12/19/2013US20130334708 Stacked semiconductor package having electrical connections of varying heights between substrates, and semiconductor device including the stacked semiconductor package
12/19/2013US20130334706 Integrated circuit package and method of making same
12/19/2013US20130334705 Semiconductor device
12/19/2013US20130334704 Deposition and Selective Removal of Conducting Helplayer for Nanostructure Processing
12/19/2013US20130334703 Wiring substrate and method of manufacturing the same
12/19/2013US20130334702 Semiconductor memory device, memory system including the same and method of manufacturing the same
12/19/2013US20130334701 Through silicon via wafer and methods of manufacturing
12/19/2013US20130334700 Etch damage and esl free dual damascene metal interconnect
12/19/2013US20130334699 Semiconductor device and fabricating method thereof
12/19/2013US20130334698 Microelectronic assembly tolerant to misplacement of microelectronic elements therein
12/19/2013US20130334697 Integrated circuit packaging system with through silicon via and method of manufacture thereof
12/19/2013US20130334696 Bumpless build-up layer package design with an interposer
12/19/2013US20130334695 Electronic device and method of manufacturing such device
12/19/2013US20130334694 Packaging substrate, semiconductor package and fabrication method thereof
12/19/2013US20130334693 Raised silicide contact
12/19/2013US20130334692 Bonding Package components Through Plating
12/19/2013US20130334691 Sidewalls of electroplated copper interconnects
12/19/2013US20130334690 Semiconductor structure and process thereof
12/19/2013US20130334689 Apparatus and method for low contact resistance carbon nanotube interconnect
12/19/2013US20130334688 Multi-elements-doped zinc oxide film, manufacturing method and application thereof
12/19/2013US20130334687 Semiconductor device
12/19/2013US20130334686 Carrier-free land grid array ic chip package and preparation method thereof
12/19/2013US20130334685 Embedded packages and methods of manufacturing the same
12/19/2013US20130334684 Substrate structure and package structure
12/19/2013US20130334683 Electronic device packages having bumps and methods of manufacturing the same
12/19/2013US20130334682 Embedded packages including a multi-layered dielectric layer and methods of manufacturing the same
12/19/2013US20130334681 Semiconductor package structure and method for making the same
12/19/2013US20130334680 Wafer level packages of high voltage units for implantable medical devices and corresponding fabrication methods
12/19/2013US20130334677 Semiconductor Modules and Methods of Formation Thereof
12/19/2013US20130334676 Semiconductor module and manufacturing method thereof
12/19/2013US20130334675 Package structure having lateral connections
12/19/2013US20130334674 Integrated circuit packaging system with tiebar-less design and method of manufacture thereof
12/19/2013US20130334673 Flexible power module semiconductor packages
12/19/2013US20130334672 Semiconductor device and manufacturing method thereof
12/19/2013US20130334671 Semiconductor package and lead frame thereof
12/19/2013US20130334669 Semiconductor device
12/19/2013US20130334668 Integrated circuit packaging system with an encapsulation and method of manufacture thereof
12/19/2013US20130334659 Multiple Depth Vias In An Integrated Circuit
12/19/2013US20130334656 Electrical interconnection structures including stress buffer layers
12/19/2013US20130334611 Semiconductor device and manufacturing method thereof
12/19/2013US20130334531 Systems and methods for measuring temperature and current in integrated circuit devices
12/19/2013US20130334529 Semiconductor device
12/19/2013US20130334291 Method of forming solder on pad on fine pitch pcb and method of flip chip bonding semiconductor using the same
12/19/2013US20130333675 Sensor assembly with protective coating and method of applying same
12/19/2013DE102013106271A1 Verfahren zur Herstellung einer Chipkapselung, Verfahren zur Herstellung einer Wafer-Level-Kapselung, Chipkapselung und Wafer-Level-Kapselung A process for preparing a Chipkapselung, method for producing a wafer level encapsulation, Chipkapselung and wafer-level encapsulation
12/19/2013DE102013106113A1 Halbleitermodule und Verfahren zu ihrer Herstellung Semiconductor modules and methods for their preparation
12/19/2013DE102012210306A1 Method for manufacturing substrate for e.g. MOSFET for rectifying and inverting electric voltage and current, involves applying metallization layer on insulating material, and electrodepositing metal layer on metallization layer
12/19/2013DE102012210261A1 Power semiconductor module for controlling electromotor, has set of coils directly arranged beside conductor path or current conductor, and another set of coils directly arranged beside another conductor path or another current conductor
12/19/2013DE102012210158A1 Semiconductor module i.e. power semiconductor module, has base plate comprising thickened portion whose maximum thickness is greater than average thickness of base plate, and circuit carrier soldered with thickened portion by solder
12/19/2013DE102012210124A1 Verbundbauteil sowie Verfahren zum Herstellen eines Verbundbauteils The composite component as well as method for producing a composite component
12/19/2013DE102012210033A1 Bauelement mit Durchkontaktierung und Verfahren zur Herstellung Component having through-hole plating and methods for preparing
12/19/2013DE102012111574A1 Ätzschaden- und esl-freie dual-damaszene metallkontaktstruktur Ätzschaden- and esl-free dual-metal contact at that scene structure
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