Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
09/2003
09/30/2003US6627092 Method for the fabrication of electrical contacts
09/30/2003US6626680 Wire bonding surface
09/30/2003US6626233 Bi-level heat sink
09/30/2003US6626222 System for fabricating semiconductor components
09/30/2003US6625883 Method for making a bump structure
09/30/2003US6625882 System and method for reinforcing a bond pad
09/28/2003CA2379600A1 Structure and manufacture of a heat sink with high heat transmission
09/25/2003WO2003079565A1 Millimeter wave (mmw) radio frequency transceiver module and method of forming same
09/25/2003WO2003079454A1 Detector arrangement, method for the detection of electrical charge carriers and use of an ono field effect transistor of r detection of an electrical charge
09/25/2003WO2003079440A1 Active matrix electroluminescent display devices, and their manufacture
09/25/2003WO2003079439A2 Chip stack with intermediate cavity
09/25/2003WO2003079437A2 Semiconductor device having a bond pad and method therefor
09/25/2003WO2003079436A1 Computer assembly for facilitating heat dissipation
09/25/2003WO2003079435A2 Microwave monolithic integrated circuit assembly with multi-orientation pyrolytic graphite heat-dissipating assembly
09/25/2003WO2003079434A2 Semiconductor device having a wire bond pad and method therefor
09/25/2003WO2003079432A2 Automatically adjusting serial connections of thick and thin layers and method for the production thereof
09/25/2003WO2003079431A1 Semiconductor device and its manufacturing method, circuit board, and electric apparatus
09/25/2003WO2003079430A1 Semiconductor device and its manufacturing method, circuit board and electronic apparatus
09/25/2003WO2003079429A1 Production method for semiconductor integrated circuit device
09/25/2003WO2003079410A2 Supporting control gate connection on a package using additional bumps
09/25/2003WO2003079407A2 Wafer-level coated copper stud bumps
09/25/2003WO2003079374A2 Methods for forming articles having very small channels therethrough, and such articles, and methods of using such articles
09/25/2003WO2003078353A1 Method for the production of a metal-ceramic substrate, preferably a copper-ceramic substrate
09/25/2003WO2003078153A2 Lamination of high-layer-count substrates
09/25/2003WO2003054957A3 Electronic component and method for producing the same
09/25/2003WO2003052817B1 Method of bonding and transferring a material to form a semiconductor device
09/25/2003WO2003038894A3 Chip module
09/25/2003WO2003012856A3 Method for hermetically encapsulating a component
09/25/2003WO2003009318A3 Support with getter-material for microelectronic, microoptoelectronic or micromechanical device
09/25/2003WO2003009317A3 Support with integrated deposit of gas absorbing material for manufacturing microelectronic, microoptoelectronic or micromechanical devices
09/25/2003WO2002097880A3 Power semiconductor module and method for the production of a power semiconductor module
09/25/2003WO2002086967A3 Method for producing metallic bit line contacts
09/25/2003WO2002017392A3 Polymer redistribution of flip chip bond pads
09/25/2003US20030181750 Causing a Grignard reaction of an organometallic silane compound to form a carbon-bridged silane oligomer, removing by-product, mixing intermediate with solvent, water and a catalyst for hydrolysis and condensation to form polysilicate
09/25/2003US20030181624 Comprises diorganopolysiloxane with two alkenyl groups bonded to silicon atoms, an organohydrogenpolysiloxane with two hydrogen atoms bonded to silicon atoms, an adhesion promoter, a platinum based catalyst, and a reaction control agent
09/25/2003US20030181537 Process for producing dielectric layers by using multifunctional carbosilanes
09/25/2003US20030181321 Composite particles for electrocatalytic applications
09/25/2003US20030181071 Separable electrical interconnect with anisotropic conductive elastomer and a rigid adapter
09/25/2003US20030181064 Semiconductor substrate structure and a semiconductor device
09/25/2003US20030181059 Method for fabricating pad oxide layer in semiconductor integrated circuits
09/25/2003US20030181058 Photoresist removal from alignment marks through wafer edge exposure
09/25/2003US20030181045 Integrated circuit chip having anti-moisture-absorption film at edge thereof and method of forming anti-moisture-absorption film
09/25/2003US20030181041 Miniaturization of plastic package by increasing ratio of size of integrated circuit chip to package size
09/25/2003US20030181036 Compound structure for reduced contact resistance
09/25/2003US20030181031 Method for manufacturing a semiconductor device
09/25/2003US20030181030 Method of forming an intermetal dielectric layer
09/25/2003US20030181029 Pad structure for bonding pad and probe pad and manufacturing method thereof
09/25/2003US20030181025 Chip differentiation at the level of a reticle
09/25/2003US20030181018 Low k interconnect dielectric using surface transformation
09/25/2003US20030180988 Semiconductor device and method of manufacturing the same
09/25/2003US20030180987 Stacked die package
09/25/2003US20030180986 Semiconductor device manufacturing method using ultrasonic flip chip bonding technique
09/25/2003US20030180985 Method for manufacturing a semiconductor device and a resin sealing device therefor
09/25/2003US20030180968 Method of preventing short circuits in magnetic film stacks
09/25/2003US20030180669 Micro-pattern forming method for semiconductor device
09/25/2003US20030180510 Multilayer wiring board, semiconductor device mounting board using same, and method of manufacturing multilayer wiring board
09/25/2003US20030180484 Mixture of silicone gel and heat conductive filler
09/25/2003US20030180462 Rotating; uniform coating; surface photoresist patterns
09/25/2003US20030180206 Process for manufacturing boron nitride fibres and resulting fibres
09/25/2003US20030180034 Carbon wire heating object sealing heater and fluid heating apparatus using the same heater
09/25/2003US20030179559 Electronic component comprising an electrically conductive connection consisting of carbon nanotubes and a method for producing the same
09/25/2003US20030179556 Enhanced die-up ball grid array package with two substrates and method for making the same
09/25/2003US20030179552 Printed circuit board and method of producing the same
09/25/2003US20030179550 Active package for integrated circuit
09/25/2003US20030179549 Low voltage drop and high thermal perfor mance ball grid array package
09/25/2003US20030179064 Method of making photolithographically-patterned out-of-plane coil structures
09/25/2003US20030179011 Integrated polysilicon fuse and diode
09/25/2003US20030178748 Method for encapsulating a multi-chip substrate array
09/25/2003US20030178747 Device for packing electronic components using injection moulding technology
09/25/2003US20030178731 Partial slot cover for encapsulation process
09/25/2003US20030178730 Integrated heat spreader, heat sink or heat pipe with pre-attached phase change thermal interface material and method of making an electronic assembly
09/25/2003US20030178729 Films deposited at glancing incidence for multilevel metallization
09/25/2003US20030178728 Methods of forming integrated circuit devices including cylindrical capacitors having supporters between lower electrodes and integrated circuit devices formed thereby
09/25/2003US20030178727 Wiring structure and method of forming the same
09/25/2003US20030178726 Semiconductor device built-in multilayer wiring board and method of manufacturing same
09/25/2003US20030178724 Film carrier tape for mounting electronic devices thereon and method of manufacturing the same
09/25/2003US20030178723 Semiconductor device and method of manufacturing the same
09/25/2003US20030178721 Method of fabricating a thin and fine ball-grid array package with embedded heat spreader
09/25/2003US20030178720 Integrated heat spreader, heat sink or heat pipe with pre-attached phase change thermal interface material and method of making an electronic assembly
09/25/2003US20030178719 Enhanced thermal dissipation integrated circuit package and method of manufacturing enhanced thermal dissipation integrated circuit package
09/25/2003US20030178718 Hermetically enhanced plastic package for microelectronics and manufacturing process
09/25/2003US20030178717 Flip chip with solder pre-plated leadframe including locating holes
09/25/2003US20030178716 Light thin stacked package semiconductor device and process for fabrication thereof
09/25/2003US20030178714 Semiconductor device having a built-in contact-type sensor and manufacturing method thereof
09/25/2003US20030178713 Wiring board, method for manufacturing wiring board and electronic component using wiring board
09/25/2003US20030178712 Semiconductor device and method for producing the same
09/25/2003US20030178711 Semiconductor laser device
09/25/2003US20030178710 Semiconductor chip stack structure and method for forming the same
09/25/2003US20030178709 Method of manufacturing semiconductor device
09/25/2003US20030178708 Leadframe and method for manufacturing resin-molded semiconductor device
09/25/2003US20030178707 Preplated stamped small outline no-lead leadframes having etched profiles
09/25/2003US20030178706 Semiconductor integrated circuit
09/25/2003US20030178703 Patterning semiconductor layers using phase shifting and assist features
09/25/2003US20030178697 Prevent impurities from being generated by contactors while etching dielectric
09/25/2003US20030178696 Multilayer; dielectrics, electrodes, spacers
09/25/2003US20030178695 Micro device
09/25/2003US20030178694 Integrated inductor
09/25/2003US20030178693 Scalable high performance antifuse structure and process
09/25/2003US20030178692 Reduced terminal testing system
09/25/2003US20030178686 Stacked capacitor-type semiconductor storage device and manufacturing method thereof