Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
11/2003
11/11/2003US6644396 Anchor base for heat sink of IC chipset
11/11/2003US6644395 Thermal interface material having a zone-coated release linear
11/11/2003US6644387 Heat sink assembly with spring clamp
11/11/2003US6644386 Engaging mechanism for heat-dissipating member
11/11/2003US6644058 Modular sprayjet cooling system
11/11/2003US6643923 Processes for manufacturing flexible wiring boards
11/11/2003US6643919 Method of fabricating a semiconductor device package having a core-hollowed portion without causing resin flash on lead frame
11/11/2003US6643916 Method to assemble a capacitor plate for substrate components
11/11/2003CA2273223C Chip-size package using a polyimide pcb interposer
11/11/2003CA2145081C Liquid-coolant cooling element
11/10/2003CA2385911A1 Method and apparatus for two dimensional assembly of particles
11/06/2003WO2003092174A2 Manufacturing method for a wireless communication device and manufacturing apparatus
11/06/2003WO2003092073A2 Electrical contacts for flexible displays
11/06/2003WO2003092071A2 Integrated circuit comprising several sensors for detecting a manipulation
11/06/2003WO2003092070A2 Power and ground shield mesh to remove both capacitive and inductive signal coupling effects of routing in integrated circuit device
11/06/2003WO2003092069A1 Method of calibrating marking in laser marking system
11/06/2003WO2003092067A2 Integrated circuit layout modification
11/06/2003WO2003092066A1 A solder interconnection having a layered barrier structure and method for forming same
11/06/2003WO2003092045A2 Method for producing an electrical circuit
11/06/2003WO2003092042A2 Clamping assembly for high-voltage solid state devices
11/06/2003WO2003077618A3 Attachment of surface mount devices to printed circuit boards using a thermoplastic adhesive
11/06/2003WO2003063348A3 On-chip multilayer metal shielded transmission line
11/06/2003WO2003056625A3 Wirebond structure and method of wire bonding a microelectronic die
11/06/2003WO2003053118A3 Cooling device for a chip and method for production thereof
11/06/2003WO2003049185A3 Semiconductor component circuit with a reduced oscillation tendency
11/06/2003WO2003043085A3 Electronic device carrier adapted for transmitting high frequency signals
11/06/2003WO2003032370A3 Stacked packages
11/06/2003WO2003029166A3 Self-constrained low temperature glass-ceramic unfired tape for microelectronics and methods for making and using the same
11/06/2003WO2003028096A3 Multilayer thin film hydrogen getter
11/06/2003WO2003028094A3 Method of self-assembly of electronic or optical components using an adhesive
11/06/2003WO2003028085A3 Method for producing a ceramic substrate
11/06/2003WO2003021690A3 Method of depositing an oxide layer on a substrate and a photovoltaic cell using said substrate
11/06/2003WO2003001594A3 High-voltage module and method for producing the same
11/06/2003WO2002089208A3 Arrangement comprising at least two different electronic semiconductor circuits
11/06/2003WO2002075926A3 Antifuse reroute of dies
11/06/2003WO2002069494A3 Integrated circuit comprising an energy storage capacitor
11/06/2003WO2002065030A8 Improved efficiency thermoelectrics utilizing thermal isolation
11/06/2003WO2002061764A8 Compliant and crosslinkable thermal interface materials
11/06/2003WO2002058142A3 Power module
11/06/2003WO2002048701A8 Nanosensors
11/06/2003US20030208009 Epoxy resin compositions, solid state devices encapsulated therewith and method
11/06/2003US20030208008 A curable blends comprising a cyclic polymer of epoxy resin, curing agent hexahydro-4-methylphthalic anhydride, boron compound halogen-free catalyst; use for packaging a chip, light emitting diode; resist to heat, oxidation, radiation
11/06/2003US20030207745 Multilayer ceramic substrates that have a substrate body and metal wiring conductors comprising silver are manufactured, a composition comprising not only a borosilicate glass powder and a ceramic powder, but also an additive powder comprising
11/06/2003US20030207574 Semiconductor device manufacturing method having a step of applying a copper foil on a substrate as a part of a wiring connecting an electrode pad to a mounting terminal
11/06/2003US20030207572 Semiconductor device and its manufacturing method
11/06/2003US20030207566 High performance silicon contact for flip chip
11/06/2003US20030207564 Copper dual damascene interconnect technology
11/06/2003US20030207562 Method and apparatus for improving adhesion between layers in integrated devices
11/06/2003US20030207561 Interconnect structures containing conductive electrolessly deposited etch stop layers, liner layers, and via plugs
11/06/2003US20030207560 Use of conductive electrolessly deposited etch stop layers, liner layers and via plugs in interconnect structures
11/06/2003US20030207558 Method forming copper containing semiconductor features to prevent thermally induced defects
11/06/2003US20030207557 Semiconductor device and its manufacturing method
11/06/2003US20030207553 Method for fabricating semiconductor device and forming interlayer dielectric film using high-density plasma
11/06/2003US20030207550 Ultra thin tungsten metal films used as adhesion promoter between barrier metals and copper
11/06/2003US20030207537 Test structure and methodology for semiconductor stress-induced defects and antifuse based on same test structure
11/06/2003US20030207526 Anti-fuse structure and method of writing and reading in integrated circuits
11/06/2003US20030207516 Stacked die in die BGA package
11/06/2003US20030207515 Stacked die in die BGA package
11/06/2003US20030207510 Semiconductor device, and its manufacturing method, circuit substrate, and electronic apparatus
11/06/2003US20030207501 Semiconductor component with adjustment circuitry and method of fabrication
11/06/2003US20030207499 Compliant integrated circuit package
11/06/2003US20030207498 Partially patterned lead frames and methods of making and using the same in semiconductor packaging
11/06/2003US20030207496 Semiconductor device and method for manufacturing the same
11/06/2003US20030207495 Stacked leads-over chip multi-chip module
11/06/2003US20030207494 Semiconductor package, semiconductor device, electronic device, and method for producing semiconductor package
11/06/2003US20030207492 Semiconductor device and method for fabricating the same
11/06/2003US20030207490 Wafer level underfill and interconnect process
11/06/2003US20030207489 Semiconductor device and manufacturing method using a stress-relieving film attached to solder joints
11/06/2003US20030207146 Member for semiconductor device using an aluminum nitride substrate material, and method of manufacturing the same
11/06/2003US20030207135 Dispersion for electrodeposition which has excellent shelf life and can form thin, high dielectric constant films, as well as a high dielectric constant film formed from the aqueous dispersion and electronic parts provided with the high
11/06/2003US20030207131 Low dielectric constant film material, film and semiconductor device using such material
11/06/2003US20030207128 Thermally conductive sheet
11/06/2003US20030207117 Sheet resin composition and process for manufacturing semiconductor device therewith
11/06/2003US20030207114 Methods of using adhesion enhancing layers and microelectronic integrated modules including adhesion enhancing layers
11/06/2003US20030207112 A pigment with modified properties because of the powder size being below 100 nanometers. Blue, yellow and brown pigments are illustrated. Nanoscale coated, un-coated, whisker inorganic fillers are included. Stoichiometric and
11/06/2003US20030207095 Repairing surfaces; colorimetric analysis using computer; applying primer to substrate, overcoating; measurement, calibration of color
11/06/2003US20030207064 Thermally-conductive interface for conductively cooling a heat generating electronic component having an associated thermal dissipation member such as a heat sink. The interface is formed as a self-supporting layer of a thermally-conductive
11/06/2003US20030206680 Devices having compliant wafer-level input/output interconnections and packages using pillars and methods of fabrication thereof
11/06/2003US20030206405 Circuit package for electronic systems
11/06/2003US20030206401 BGA/LGA with built in heat slug/spreader
11/06/2003US20030206388 Universial energy conditioning interposer with circuit architecture
11/06/2003US20030206261 Micro circuits with a sculpted ground plane
11/06/2003US20030206049 Semiconductor integrated circuit
11/06/2003US20030206047 Power integrated circuit with distributed gate driver
11/06/2003US20030206035 Conductive material for integrated circuit fabrication
11/06/2003US20030206030 Universal wafer carrier for wafer level die burn-in
11/06/2003US20030205828 Transfer mold packaging with conductive traces; soldermask has a openings to locations on the conductive traces and includes a elongated trench to align with an elongated mold void perimeter of a transfer mold
11/06/2003US20030205827 Wirebond structure and method to connect to a microelectronic die
11/06/2003US20030205825 Structure for connecting interconnect lines and method of manufacturing same
11/06/2003US20030205824 Etch stop layer for silicon (Si) via etch in three-dimensional (3-D) wafer-to-wafer vertical stack
11/06/2003US20030205821 Chip package capable of reducing moisture penetration
11/06/2003US20030205819 Physically deposited layer to electrically connect circuit edit connection targets
11/06/2003US20030205818 Semiconductor device and method for manufacturing the same
11/06/2003US20030205817 Process for making low dielectric constant hollow chip structures by removing sacrificial dielectric material after the chip is joined to a carrier
11/06/2003US20030205816 Integrated circuit configuration with analysis protection and method for producing the configuration
11/06/2003US20030205815 Fabrication method of integrated circuits with borderless vias and low dielectric constant inter-metal dielectrics
11/06/2003US20030205814 Wiring structure of semiconductor device
11/06/2003US20030205813 Method of forming a multi-layered wiring structure incorporation in semiconductor intergrated circuit device and having large electromigration resistance.
11/06/2003US20030205812 Semiconductor device protective overcoat with enhanced adhesion to polymeric materials and method of fabrication
11/06/2003US20030205811 Method for fabricating semiconductor integrated circuit