Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 23 - Details of semiconductor or other solid state devices
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
11/2003
11/18/2003US6650014 Semiconductor device
11/18/2003US6650012 Semiconductor device
11/18/2003US6650010 Unique feature design enabling structural integrity for advanced low K semiconductor chips
11/18/2003US6650009 Structure of a multi chip module having stacked chips
11/18/2003US6650008 Stacked semiconductor packaging device
11/18/2003US6650007 Stackable ceramic fbga for high thermal applications
11/18/2003US6650006 Semiconductor package with stacked chips
11/18/2003US6650005 Micro BGA package
11/18/2003US6650004 Semiconductor device
11/18/2003US6650003 Radiation shielded carriers for sensitive electronics
11/18/2003US6650002 Semiconductor device having active element connected to an electrode metal pad via a barrier metal layer and interlayer insulating film
11/18/2003US6650000 For providing voltage to low-current electronic devices that exist within the integrated circuit.
11/18/2003US6649999 Semiconductor chip configuration with a layer sequence with functional elements contacted by contact pads
11/18/2003US6649998 Passive devices and modules for transceiver
11/18/2003US6649997 Semiconductor device having fuses or anti-fuses
11/18/2003US6649995 Semiconductor device and method of manufacturing the same
11/18/2003US6649991 Image sensor semiconductor package
11/18/2003US6649986 Semiconductor device with structure for die or dice crack detection
11/18/2003US6649975 Vertical power devices having trench-based electrodes therein
11/18/2003US6649961 Supporting gate contacts over source region on MOSFET devices
11/18/2003US6649945 Wiring layout to weaken an electric field generated between the lines exposed to a high voltage
11/18/2003US6649941 Flip-chip device
11/18/2003US6649937 Semiconductor device with components embedded in backside diamond layer
11/18/2003US6649932 Electrical print resolution test die
11/18/2003US6649834 Injection molded image sensor and a method for manufacturing the same
11/18/2003US6649833 Negative volume expansion lead-free electrical connection
11/18/2003US6649832 Apparatus and method for coupling with components in a surface mount package
11/18/2003US6649831 I-channel surface-mount connector with extended flanges
11/18/2003US6649533 Method and apparatus for forming an under bump metallurgy layer
11/18/2003US6649522 Etch stop in damascene interconnect structure and method of making
11/18/2003US6649517 Copper metal structure for the reduction of intra-metal capacitance
11/18/2003US6649511 Method of manufacturing a seed layer with annealed region for integrated circuit interconnects
11/18/2003US6649509 Post passivation metal scheme for high-performance integrated circuit devices
11/18/2003US6649507 Dual layer photoresist method for fabricating a mushroom bumping plating structure
11/18/2003US6649506 Method of fabricating vias in solder pads of a ball grid array (BGA) substrate
11/18/2003US6649501 Method for forming a bit line for a semiconductor device
11/18/2003US6649500 Semiconductor device including an insulated gate field effect transistor and method of manufacturing the same
11/18/2003US6649499 Method of varying the resistance along a conductive layer
11/18/2003US6649498 Metal film protection of the surface of a structure formed on a semiconductor substrate during etching of the substrate by a KOH etchant
11/18/2003US6649497 Method of forming vias in silicon carbide and resulting devices and circuits
11/18/2003US6649495 Manufacturing method of semiconductor device
11/18/2003US6649490 Methods for forming integrated circuit devices through selective etching of an insulation layer to increase the self-aligned contact area adjacent a semiconductor region and integrated circuit devices formed thereby
11/18/2003US6649458 Method for manufacturing semiconductor device with hetero junction bipolar transistor
11/18/2003US6649451 Structure and method for wafer comprising dielectric and semiconductor
11/18/2003US6649450 Method of producing an integrated circuit and an integrated circuit
11/18/2003US6649448 Method of manufacturing a semiconductor device having flexible wiring substrate
11/18/2003US6649447 Methods for plastic injection molding, with particular applicability in facilitating use of high density lead frames
11/18/2003US6649446 Hermetic package for multiple contact-sensitive electronic devices and methods of manufacturing thereof
11/18/2003US6649445 Wafer coating and singulation method
11/18/2003US6649443 System for facilitating alignment of silicon die
11/18/2003US6649441 Photolithography, etching, chemical mechanical polishing, micro- electrodeposition
11/18/2003US6649429 In-line electrical monitor for measuring mechanical stress at the device level on a semiconductor wafer
11/18/2003US6649428 Semiconductor chip, semiconductor integrated circuit using the same, and method of selecting semiconductor chip
11/18/2003US6649325 Thermally conductive dielectric mounts for printed circuitry and semi-conductor devices and method of preparation
11/18/2003US6649265 Carbon-based metal composite material, method for preparation thereof and use thereof
11/18/2003US6649258 Polysiloxane; integrated circuit
11/18/2003US6649108 Method of manufacturing a U-shaped heat sink assembly
11/18/2003US6649077 Method and apparatus for removing coating layers from alignment marks on a wafer
11/18/2003US6649012 Adhesion method and electronic component
11/18/2003US6648664 Foldable retention device for pressing a heat sink to an electronic package mounted on a socket connector
11/18/2003US6648065 Heat-dissipating module
11/18/2003US6648064 Active heat sink
11/18/2003US6648062 Heat sink-type cooling device
11/18/2003US6647625 Method for fabricating a heat pipe structure in a radiating plate
11/18/2003US6647620 Method of making center bond flip chip semiconductor carrier
11/18/2003US6647619 Positioning arrangement and method
11/13/2003WO2003094587A1 Improvements relating to heatsinks
11/13/2003WO2003094586A1 Circuit board with smd component and cooling body
11/13/2003WO2003094236A1 Semiconductor device and radio communication apparatus
11/13/2003WO2003094234A2 Component
11/13/2003WO2003094233A1 Integrated circuit with integrated capacitor and methods for making same
11/13/2003WO2003094232A1 Semiconductor device and electronic device
11/13/2003WO2003094231A1 Bond pad structure comprising tungsten or tungsten compound layer on top of metallization level
11/13/2003WO2003094230A1 Connection device and method for producing the same
11/13/2003WO2003094229A1 Method of producing electronic units
11/13/2003WO2003094223A1 Method for measuring withstand voltage of semiconductor epitaxial wafer and semiconductor epitaxial wafer
11/13/2003WO2003094220A1 Submount and semiconductor device
11/13/2003WO2003094209A2 Use of conductive electrolessly deposided etch stop layers, liner layers and via plugs in interconnect structures
11/13/2003WO2003094203A2 Direct-connect signaling system
11/13/2003WO2003094202A2 Micro circuits with a sculpted ground plane
11/13/2003WO2003092350A2 Material and method for improved heat dissipation and mechanical hardness for magnetic recording transducers and other electronic devices
11/13/2003WO2003069968A3 Housing for a power semiconductor module which is resistant to high voltages
11/13/2003WO2003063245A3 Process condition sensing wafer and data analysis system
11/13/2003WO2003042721A3 Trilayered beam mems device and related methods
11/13/2003WO2003036715A3 Adhesive wafers for die attach application
11/13/2003WO2003034492A8 Apparatus and methods for semiconductor ic failure detection
11/13/2003WO2003029322A9 Curing agent composition for epoxy resins, epoxy resin composition and use thereof
11/13/2003WO2003028412A3 Test structures and models for estimating the yield impact of dishing and/or voids
11/13/2003WO2003023853A3 Electronic assemblies with high capacity heat sinks and methods of manufacture
11/13/2003WO2003019649A8 Strip conductor arrangement and method for producing a strip conductor arrangement
11/13/2003WO2003017328A3 Encapsulated integrated circuit package and method of manufacturing an integrated circuit package
11/13/2003WO2002086969A3 Non-optical signal isolator
11/13/2003WO2002073687A3 Method of removing oxide from copper bond pads
11/13/2003WO2002058108A8 Wafer applied fluxing and underfill material, and layered electronic assemblies manufactured therewith
11/13/2003US20030211931 Low temperature co-firing ceramic (LTCC) composition for microwave frequency
11/13/2003US20030211761 Low cost integrated out-of-plane micro-device structures and method of making
11/13/2003US20030211737 Semiconductor device and method of manufacturing same
11/13/2003US20030211733 Graded/stepped silicide process to improve mos transistor
11/13/2003US20030211728 Very low dielectric constant plasma-enhanced CVD films
11/13/2003US20030211724 Providing electrical conductivity between an active region and a conductive layer in a semiconductor device using carbon nanotubes
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