Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 23 - Details of semiconductor or other solid state devices
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
11/2003
11/25/2003US6652805 Highly filled composites of powdered fillers and polymer matrix
11/25/2003US6652705 Graphitic allotrope interface composition and method of fabricating the same
11/25/2003US6652291 Leadframe interposer
11/25/2003US6652290 Connecting devices and method for interconnecting circuit components
11/25/2003US6651870 Solder alloy, substrate with solder alloy for mounting electronic part, member to be bonded of electronic part, and electronic-part-mounted substrate
11/25/2003US6651735 Evaporator of CPL cooling apparatus having fine wick structure
11/25/2003US6651734 Multi-element heat dissipating module
11/25/2003US6651733 Heat sink
11/25/2003US6651331 Method of establishing a thermal joint on a heat sink
11/25/2003US6651321 Microelectronic joining processes
11/25/2003US6651320 Connection reliability and connection strength in bonding of the semiconductor element and circuit board are enhance and connection resistance value is stabilized low
11/25/2003CA2345804C Method for preparing metal powder
11/20/2003WO2003096439A1 Integrated circuit with internal impedance matching circuit
11/20/2003WO2003096420A1 Circuit comprising a capacitor and at least one semiconductor component, and method for designing same
11/20/2003WO2003096419A2 Integrated strip conductor arrangement
11/20/2003WO2003096418A1 Improving the triggering of an esd nmos through the use of an n-type buried layer
11/20/2003WO2003096417A1 Connecting device for contacting a semiconductor component
11/20/2003WO2003096416A2 Reactive solder material
11/20/2003WO2003096415A1 Semiconductor component
11/20/2003WO2003096411A1 A method for forming conformal nitrified tantalum silicide films by thermal cvd followed by nitridation
11/20/2003WO2003096389A2 Metal object to be at least partially coated with a substance
11/20/2003WO2003096265A1 Method of producing a digital fingerprint sensor and the corresponding sensor
11/20/2003WO2003095922A2 Cooling unit and flow distributing element for use in such unit
11/20/2003WO2003095712A2 Method of and apparatus for forming three-dimensional structures integral with semiconductor based circuitry
11/20/2003WO2003095702A2 Method for curing low dielectric constant film by electron beam
11/20/2003WO2003095108A1 Method and apparatus for two dimensional assembly of particles
11/20/2003WO2003069695A3 Multilayer package for a semiconductor device
11/20/2003WO2003067940A3 Circuit carrier and production thereof
11/20/2003WO2003056603A3 Self-ionized and inductively-coupled plasma for sputtering and resputtering
11/20/2003WO2003052815A3 Electrode structure for use in an integrated circuit
11/20/2003WO2003043081A3 An electronic assembly having a wetting layer on a thermally conductive heat spreader
11/20/2003WO2003034491A3 Semiconductor component
11/20/2003WO2003028100A3 Encapsulation of pin solder for maintaining accuracy in pin position
11/20/2003WO2003028088A3 Methods of forming metallurgy structures for wire and solder bonding and related structures
11/20/2003WO2003028044A3 Non-conductive substrate forming a strip or a panel, on which a plurality of carrier elements are configured
11/20/2003WO2003019656A3 Interconnect module with reduced power distribution impedance
11/20/2003WO2003019653A3 Method for producing contacts and printed circuit packages
11/20/2003WO2003017327A3 A method and apparatus for die stacking
11/20/2003WO2003010796A3 Structure and method for fabrication of a leadless chip carrier with embedded antenna
11/20/2003WO2003009342A3 Data carrier for contactless communication with an integrated component
11/20/2003WO2003003458A3 Power pads for application of high current per bond pad in silicon technology
11/20/2003WO2002099882A3 Mmic with off-chip bias feed system
11/20/2003WO2002093647A3 Electronic package with high density interconnect and associated methods
11/20/2003WO2002078087A3 Semiconductor chip having multiple conductive layers in an opening, and method for fabricating same
11/20/2003WO2002065475A8 Self-aligned conductive line for cross-point magnetic memory integrated circuits
11/20/2003WO2002001637A9 Layout and process for a device with segmented ball limited metallurgy for the inputs and outputs
11/20/2003US20030216058 Process for preparing insulating material having low dielectric constant
11/20/2003US20030216054 Method of manufacturing semiconductor device
11/20/2003US20030216039 Method for fabricating an under bump metallization structure
11/20/2003US20030216033 Method for forming wiring structure
11/20/2003US20030216029 Method of selectively alloying interconnect regions by deposition process
11/20/2003US20030216024 PBGA substrate for anchoring heat sink
11/20/2003US20030216023 Projected contact structures for engaging bumped semiconductor devices and methods of making the same
11/20/2003US20030216010 Forming a multi segment integrated circuit with isolated substrates
11/20/2003US20030216009 Semiconductor device and manufacturing the same
11/20/2003US20030215993 Electronic component and fabricating method
11/20/2003US20030215987 Simple process for fabricating semiconductor devices
11/20/2003US20030215984 Chip and wafer integration process using vertical connections
11/20/2003US20030215982 Semiconductor device with a staggered pad arrangement
11/20/2003US20030215980 Method of manufacturing a semiconductor device
11/20/2003US20030215973 Manufacturing method of semiconductor device
11/20/2003US20030215970 Deposition method of insulating layers having low dielectric constant of semiconductor device
11/20/2003US20030215966 Circular test pads on scribe street area
11/20/2003US20030215619 Metal core substrate and process for manufacturing same
11/20/2003US20030215116 Fingerprint sensor having enhanced ESD protection and associated methods
11/20/2003US20030214800 System and method for processor power delivery and thermal management
11/20/2003US20030214797 Multilayer printed circuit board
11/20/2003US20030214796 High frequency module mounting structure in which solder is prevented from peeling
11/20/2003US20030214795 Electronic component with bump electrodes, and manufacturing method thereof
11/20/2003US20030214787 Heat sink clip assembly
11/20/2003US20030214786 Cooling device and an electronic apparatus including the same
11/20/2003US20030214784 Cooling assembly for a heat producing assembly
11/20/2003US20030214769 Over-voltage protection circuit
11/20/2003US20030214378 Accurate multi-ground inductor for optical communication circuits
11/20/2003US20030214344 Semiconductor circuit device adaptable to plurality of types of packages
11/20/2003US20030214074 Mold with compensating base
11/20/2003US20030214053 Tape carrier package and method of fabricating the same
11/20/2003US20030214052 IC chip packaging for reducing bond wire length
11/20/2003US20030214051 Semiconductor package and method of preparing same
11/20/2003US20030214050 Semiconductor device
11/20/2003US20030214049 Heat dissipating flip-chip ball grid array
11/20/2003US20030214048 Semiconductor package and fabricating method thereof
11/20/2003US20030214047 Semiconductor device, method for mounting the same, and method for repairing the same
11/20/2003US20030214046 Semiconductor devices having protected plug contacts and upper interconnections
11/20/2003US20030214045 Miniaturized contact spring
11/20/2003US20030214043 Semiconductor device
11/20/2003US20030214041 Semiconductor device with multilevel wiring layers
11/20/2003US20030214040 Semiconductor device and method of manufacturing the same
11/20/2003US20030214039 Method for fabricating semiconductor device having tertiary diffusion barrier layer for copper line
11/20/2003US20030214038 Semiconductor device
11/20/2003US20030214037 Metallic strain-absorbing layer for improved fatigue resistance of solder-attached devices
11/20/2003US20030214036 Under bump metallurgy structural design for high reliability bumped packages
11/20/2003US20030214035 Bump formed on semiconductor device chip and method for manufacturing the bump
11/20/2003US20030214034 Semiconductor device having bump electrode
11/20/2003US20030214033 Semiconductor device having pad electrode connected to wire
11/20/2003US20030214032 Conductive hardening resin for a semiconductor device and semiconductor device using the same
11/20/2003US20030214031 Thermoelectric module package
11/20/2003US20030214030 Breaking out signals from an integrated circuit footprint
11/20/2003US20030214029 Multichip wafer-level package and method for manufacturing the same
11/20/2003US20030214027 Circuit substrate device, method for producing the same, semiconductor device and method for producing the same
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