Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
01/2004
01/06/2004US6674176 Wire bond package with core ring formed over I/O cells
01/06/2004US6674175 Ball grid array chip packages having improved testing and stacking characteristics
01/06/2004US6674174 Controlled impedance transmission lines in a redistribution layer
01/06/2004US6674173 Stacked paired die package and method of making the same
01/06/2004US6674172 Flip-chip package with underfill having low density filler
01/06/2004US6674171 Semiconductor device with a low resistance wiring
01/06/2004US6674170 Barrier metal oxide interconnect cap in integrated circuits
01/06/2004US6674168 Reworking beol (back end of a processing line) metallization levels of damascene metallurgy
01/06/2004US6674167 Multilevel copper interconnect with double passivation
01/06/2004US6674166 Flip-chip integrated circuit routing to I/O devices
01/06/2004US6674165 Mold for a semiconductor chip
01/06/2004US6674164 System for uniformly interconnecting and cooling
01/06/2004US6674163 Package structure for a semiconductor device
01/06/2004US6674162 Semiconductor device and manufacturing method thereof
01/06/2004US6674160 Multi-chip semiconductor device
01/06/2004US6674159 Bi-level microelectronic device package with an integral window
01/06/2004US6674158 Photocurable polymer resin (e.g., phenol-formaldehyde epoxy novolac resin) and a photoactive compound, such as cd1011 (triarylsulfonium hexafluorophosphate or ?sartomer?)
01/06/2004US6674157 Semiconductor package comprising vertical power transistor
01/06/2004US6674156 Multiple row fine pitch leadless leadframe package with use of half-etch process
01/06/2004US6674155 Chip carrier film, method of manufacturing the chip carrier film and liquid crystal display using the chip carrier film
01/06/2004US6674154 Lead frame with multiple rows of external terminals
01/06/2004US6674153 Semiconductor device utilizing pad to pad wire interconnection for improving detection of failed region on the device
01/06/2004US6674146 Composite dielectric layers
01/06/2004US6674143 Hermetically sealing package for optical semiconductor and optical semiconductor module
01/06/2004US6674108 Gate length control for semiconductor chip design
01/06/2004US6674092 Thin film CMOS calibration standard having protective cover layer
01/06/2004US6674036 Method for marking packaged integrated circuits
01/06/2004US6674016 Electronic component
01/06/2004US6674008 Cross substrate, method of mounting semiconductor element, and semiconductor device
01/06/2004US6674002 Interior of the housing filled with a casting material; reliably sealed polyamide-based hot melt adhesive
01/06/2004US6673725 Film forming by plasma enhanced vapor deposition using gas of nitrous oxide, water, carbon dioxide, ammonia, an alkylsiloxane and a methylsilane; coating a copper wiring
01/06/2004US6673718 Methods for forming aluminum metal wirings
01/06/2004US6673710 Method of connecting a conductive trace and an insulative base to a semiconductor chip
01/06/2004US6673708 Thermal and mechanical attachment of a heatspreader to a flip-chip integrated circuit structure using underfill
01/06/2004US6673707 Method of forming semiconductor device utilizing die active surfaces for laterally extending die internal and external connections
01/06/2004US6673698 Thin film semiconductor package utilizing a glass substrate with composite polymer/metal interconnect layers
01/06/2004US6673692 Method and apparatus for marking microelectronic dies and microelectronic devices
01/06/2004US6673656 Semiconductor chip package and manufacturing method thereof
01/06/2004US6673655 Method of making semiconductor device having improved heat radiation plate arrangement
01/06/2004US6673653 Wafer-interposer using a ceramic substrate
01/06/2004US6673652 Underfilling method for a flip-chip packaging process
01/06/2004US6673651 Method of manufacturing semiconductor device including semiconductor elements mounted on base plate
01/06/2004US6673650 Multi chip semiconductor package and method of construction
01/06/2004US6673649 Microelectronic device packages and methods for controlling the disposition of non-conductive materials in such packages
01/06/2004US6673640 Method of manufacturing semiconductor device for evaluation capable of evaluating crystal defect using in-line test by avoiding using preferential etching process
01/06/2004US6673635 Method for alignment mark formation for a shallow trench isolation process
01/06/2004US6673484 IC device, circuit board and IC assembly
01/06/2004US6673441 Adhesive, adhesive member, interconnecting substrate for semiconductor mounting having adhesive member, and semiconductor device containing the same
01/06/2004US6673436 Moisture absorbing formed article
01/06/2004US6673434 Crosslinking
01/06/2004US6673400 Hydrogen gettering system
01/06/2004US6673200 Method of reducing process plasma damage using optical spectroscopy
01/06/2004US6673180 Multilayered ceramic substrate production method
01/06/2004US6672882 Socket structure for grid array (GA) packages
01/06/2004US6672875 Spring interconnect structures
01/06/2004US6672381 Multi-load thermal regulating system with multiple serial evaporators
01/06/2004US6672379 Positioning and buckling structure for use in a radiator
01/06/2004US6672378 Thermal interface wafer and method of making and using the same
01/06/2004US6672374 Heat sink coupling device
01/06/2004US6672370 Apparatus and method for passive phase change thermal management
01/06/2004US6671957 Method of the manufacture of cooling devices
01/06/2004US6671950 Forming high frequence stable, high via density device
01/06/2004US6671948 Interconnection method using an etch stop
01/06/2004US6671947 Method of making an interposer
01/02/2004EP1377144A2 Method of mounting a leadless package and structure therefor
01/02/2004EP1377141A2 Printed circuit board, method for producing same and semiconductor device
01/02/2004EP1376742A1 High efficiency four port circuit
01/02/2004EP1376705A2 Solid-state imaging device and method of manufacturing the same
01/02/2004EP1376696A1 Semiconductor device
01/02/2004EP1376694A2 Semiconductor switching circuit device
01/02/2004EP1376693A2 Flip-chip semiconductor device having I/O modules in an internal circuit area
01/02/2004EP1376692A2 Power grid and bump pattern with reduced inductance and resistance
01/02/2004EP1376691A2 Method of making a carrier from a metallic leadframe and leadframe with a support for electronic components
01/02/2004EP1376690A2 Pressure-contact type semiconductor device
01/02/2004EP1376689A1 Radiating structural body of electronic part and radiating sheet used for the radiating structural body
01/02/2004EP1376688A2 Heat dissipator for electronic device
01/02/2004EP1376684A2 Fabrication of a semiconductor device with air gaps for ultra-low capacitance interconnections
01/02/2004EP1376678A2 Manufacturing method of semiconductor device
01/02/2004EP1376677A2 Finned heat sinks
01/02/2004EP1376672A1 Deposition method, deposition apparatus, insulating film and semiconductor integrated circuit
01/02/2004EP1376452A1 Semiconductor device and its manufacturing method
01/02/2004EP1375688A1 Heat dissipation member for electronic apparatus and method for producing the same
01/02/2004EP1375623A1 Extrudable bridged grease-like heat radiating material, container sealingly filled with the material, method of manufacturing the container, and method of radiating heat by the use thereof
01/02/2004EP1375559A1 Dielectrics with copper diffusion barrier
01/02/2004EP1375553A1 Curable resin, curable resin material, curable film, and insulator
01/02/2004EP1375417A2 Bridges for microelectromechanical structures
01/02/2004EP1374658A1 A substrate for mounting a semiconductor
01/02/2004EP1374654A1 Heat sink
01/02/2004EP1374652A2 Shunt power connection for an integrated circuit package
01/02/2004EP1374651A1 Encapsulation arrangement
01/02/2004EP1374310A2 Nanofabrication
01/02/2004EP1374309A1 Methods of fabricating nanostructures and nanowires and devices fabricated therefrom
01/02/2004EP1374307A1 Integrated inductance
01/02/2004EP1374306A2 Alternate bump metallurgy bars for power and ground routing
01/02/2004EP1374305A2 Enhanced die-down ball grid array and method for making the same
01/02/2004EP1374304A1 High frequency integrated circuit (hfic) microsystems assembly and method for fabricating the same
01/02/2004EP1374303A2 Power transistor package with integrated flange for surface mount heat removal
01/02/2004EP1374302A2 Interconnection for accomodating thermal expansion for low elastic modulus dielectrics
01/02/2004EP1374299A2 Structure and method for determining edges of regions in a semiconductor wafer
01/02/2004EP1374298A1 Chip module with bond-wire connections with small loop height