Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
05/2004
05/12/2004CN1495870A Composite intermediate connection element of microelectronic component and its making method
05/12/2004CN1495866A Semiconductor device and its making method
05/12/2004CN1495852A Semiconductor device and its making method and device
05/12/2004CN1495814A Microelectronic element bearer and mfg. method thereof
05/12/2004CN1495795A Semiconductor storage device
05/12/2004CN1495776A Voice coding device and decoding devie, optical recording medium and voice transmission method
05/12/2004CN1495587A Method for retaining heat-conducting pin in heat-conducting diffusion plate and its device
05/12/2004CN1495540A Alignment system of photoetching system utilizing at least two wavelengths and its method
05/12/2004CN1495478A Contact structure and mfg. method, thin film transistor array panel and mfg. method
05/12/2004CN1495245A Heat-conducting composite sheet and preparing method thereof
05/12/2004CN1149908C Integrated circuit assembling and disassembling device and its assembling and disassembling head
05/12/2004CN1149676C 半导体装置 Semiconductor device
05/12/2004CN1149675C Semiconductor device
05/12/2004CN1149673C Tape carrier package
05/12/2004CN1149672C Semiconductor device and manufacturing method thereof
05/12/2004CN1149671C Semiconductor device
05/12/2004CN1149669C Method for coating thermal grease on integrated circuit
05/12/2004CN1149668C Epoxy resin composition to seal semiconductors and resin-sealed semiconductor device
05/12/2004CN1149667C High thermal conductivity silicon nitride circuit substrat, and semiconductor device using the same
05/12/2004CN1149666C Silicon nitride ceramic circuit substrate and semiconductor device using the same
05/12/2004CN1149665C Semiconductive ceramic
05/12/2004CN1149664C Band with automatic linkage, integrated circuit device
05/12/2004CN1149654C Method and structrue for contact to copper metallization in insulating via on semiconductor
05/12/2004CN1149653C Copper stud structure with refractory metal liner
05/12/2004CN1149649C Producing method of relay base plate for installation of semi-conductor elements
05/12/2004CN1149643C Pattern drawing method using charged particle beams and apparatus therefor
05/12/2004CN1149642C Method for forming pattern conductin layer on semiconductor chip and semiconductor device
05/11/2004US6735651 Multi-chip module having chips coupled in a ring
05/11/2004US6735499 Method and apparatus for controlling cooling fan
05/11/2004US6735429 Methods and systems to substantially prevent fraudulent use of a wireless unit roaming in a visited system
05/11/2004US6735085 Foldable retention device for land grid array connector assembly
05/11/2004US6735084 Heat sink for electronic devices, and circuit board and plasma display panel assembly each equipped with the heat sink
05/11/2004US6735083 Porous CPU cooler
05/11/2004US6735082 Heatsink with improved heat dissipation capability
05/11/2004US6735077 Thermal diffuser and radiator
05/11/2004US6735076 Radiation apparatus
05/11/2004US6735065 Semiconductor module
05/11/2004US6734940 Semiconductor device, electro-optical device substrate, liquid crystal device substrate and manufacturing method therefor, liquid crystal device, and projection liquid crystal display device and electronic apparatus using the liquid crystal device
05/11/2004US6734728 RF power transistor with internal bias feed
05/11/2004US6734572 Pad structure for bonding pad and probe pad and manufacturing method thereof
05/11/2004US6734571 Semiconductor assembly encapsulation mold
05/11/2004US6734570 Solder bumped substrate for a fine pitch flip-chip integrated circuit package
05/11/2004US6734568 Semiconductor device and method of manufacturing the same
05/11/2004US6734567 Flip-chip device strengthened by substrate metal ring
05/11/2004US6734566 Recyclable flip-chip semiconductor device
05/11/2004US6734565 Contact structure for an integrated semiconductor device
05/11/2004US6734564 Specially shaped contact via and integrated circuit therewith
05/11/2004US6734563 Post passivation interconnection schemes on top of the IC chips
05/11/2004US6734561 Comprises silicon oxynitride antireflective coating interposed between dielectric layers for etching prevention
05/11/2004US6734559 Channel in dielectric lined with metallic barrier and filled with conductor where recess is etched
05/11/2004US6734557 Semiconductor device
05/11/2004US6734556 Semiconductor device with chip-on-chip construction joined via a low-melting point metal layer
05/11/2004US6734555 Integrated circuit package and printed circuit board arrangement
05/11/2004US6734554 Semiconductor wafer with bumps of uniform height
05/11/2004US6734553 Semiconductor device
05/11/2004US6734552 Enhanced thermal dissipation integrated circuit package
05/11/2004US6734551 Semiconductor device
05/11/2004US6734550 In-situ cap and method of fabricating same for an integrated circuit device
05/11/2004US6734547 Semiconductor wiring structure having divided power lines and ground lines on the same layer
05/11/2004US6734546 Micro grid array semiconductor die package
05/11/2004US6734545 BGA type semiconductor device and electronic equipment using the same
05/11/2004US6734544 Integrated circuit package
05/11/2004US6734542 Component built-in module and method for producing the same
05/11/2004US6734540 Semiconductor package with stress inhibiting intermediate mounting substrate
05/11/2004US6734539 Stacked module package
05/11/2004US6734536 Surface-mounting semiconductor device and method of making the same
05/11/2004US6734535 Semiconductor device, method of manufacture thereof, circuit board, and electronic instrument
05/11/2004US6734534 Microelectronic substrate with integrated devices
05/11/2004US6734532 Back side coating of semiconductor wafers
05/11/2004US6734529 Vertically mountable interposer and assembly
05/11/2004US6734525 Low stress integrated circuit fusible link
05/11/2004US6734513 Cap wafer bonded to top surface of base wafer with glass frit interposed in between; hermetic sealing
05/11/2004US6734504 Method of providing HBM protection with a decoupled HBM structure
05/11/2004US6734489 Semiconductor element and MIM-type capacitor formed in different layers of a semiconductor device
05/11/2004US6734486 Recessed plug semiconductor device and manufacturing method thereof
05/11/2004US6734481 Semiconductor device having a monitor pattern
05/11/2004US6734477 Fabricating an embedded ferroelectric memory cell
05/11/2004US6734474 Integrated semiconductor circuit having contact points and configuration having at least two such circuits
05/11/2004US6734473 Method of integrated circuit construction with port alignment and timing signal buffering within a common area
05/11/2004US6734472 Power and ground shield mesh to remove both capacitive and inductive signal coupling effects of routing in integrated circuit device
05/11/2004US6734468 Devices related to electrode pads for p-type group III nitride compound semiconductors
05/11/2004US6734458 Test pattern for measuring contact resistance and method of manufacturing the same
05/11/2004US6734372 Gate area relief strip for a molded I/C package
05/11/2004US6734371 Soldered heat sink anchor and method of use
05/11/2004US6734370 Multilayer modules with flexible substrates
05/11/2004US6734363 Lightweight electronic equipment conductor with coolant permeable support
05/11/2004US6734258 Protective coating composition for dual damascene process
05/11/2004US6734104 Method of manufacturing a semiconductor device and a semiconductor device
05/11/2004US6734096 Fine-pitch device lithography using a sacrificial hardmask
05/11/2004US6734095 Method for producing cavities with submicrometer patterns in a semiconductor device using a freezing process liquid
05/11/2004US6734093 Method for placing active circuits beneath active bonding pads
05/11/2004US6734092 Semiconductor device and manufacturing method thereof
05/11/2004US6734084 Method of manufacturing a semiconductor device with recesses using anodic oxide
05/11/2004US6734076 Method for thin film resistor integration in dual damascene structure
05/11/2004US6734060 Semiconductor integrated circuit device and process for manufacturing
05/11/2004US6734047 Thinning of fuse passivation after C4 formation
05/11/2004US6734046 Method of customizing and using maps in generating the padring layout design
05/11/2004US6734045 Lossy RF shield for integrated circuits
05/11/2004US6734044 Multiple leadframe laminated IC package
05/11/2004US6734043 Pressure-bonded heat sink method