Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
06/2004
06/15/2004US6750753 Fuse structure window
06/15/2004US6750751 Integrated magnetic signal isolator with feedback
06/15/2004US6750607 Display device
06/15/2004US6750554 Mark configuration, wafer with at least one mark configuration and method for the fabrication of at least one mark configuration
06/15/2004US6750553 Semiconductor device which minimizes package-shift effects in integrated circuits by using a thick metallic overcoat
06/15/2004US6750552 Integrated circuit package with solder bumps
06/15/2004US6750549 Variable pad diameter on the land side for improving the co-planarity of ball grid array packages
06/15/2004US6750548 Mask repattern process
06/15/2004US6750547 Package comprising first microelectronic substrate coupled to second microelectronic substrate to form assembly, and conformal conductive link coupled between first and second connection sites and conforming to contour of assembly
06/15/2004US6750546 Flip-chip leadframe package
06/15/2004US6750545 Semiconductor package capable of die stacking
06/15/2004US6750544 Metallization system for use in a semiconductor component
06/15/2004US6750543 Semiconductor device with fully self-aligned local interconnects, and method for fabricating the device
06/15/2004US6750541 Semiconductor device
06/15/2004US6750539 Joining semiconductor units with bonding material
06/15/2004US6750538 Heat transfer of solid-state devices
06/15/2004US6750536 Current supply and support system for a thin package
06/15/2004US6750535 Package for enclosing a laser diode module
06/15/2004US6750534 Heat spreader hole pin 1 identifier
06/15/2004US6750533 Substrate with dam bar structure for smooth flow of encapsulating resin
06/15/2004US6750531 Semiconductor device having polycrystalline silicon film resistor and manufacturing method therefor
06/15/2004US6750530 Semiconductor antifuse with heating element
06/15/2004US6750529 Semiconductor devices including fuses and multiple insulation layers
06/15/2004US6750517 Device layout to improve ESD robustness in deep submicron CMOS technology
06/15/2004US6750516 Systems and methods for electrically isolating portions of wafers
06/15/2004US6750494 Semiconductor buried contact with a removable spacer
06/15/2004US6750479 Semiconductor component and a method for identifying a semiconductor component
06/15/2004US6750476 Substrate device manufacturing method and substrate device, electrooptical device manufacturing method and electrooptical device and electronic unit
06/15/2004US6750405 Two signal one power plane circuit board
06/15/2004US6750397 Thermally enhanced semiconductor build-up package
06/15/2004US6750396 I-channel surface-mount connector
06/15/2004US6750152 Method and apparatus for electrically testing and characterizing formation of microelectric features
06/15/2004US6750142 Semiconductor device and method for manufacturing the same
06/15/2004US6750138 Multilayer wires laminated to integrated circuit chip; applying electrode, dielectric; pressurization
06/15/2004US6750137 Method and apparatus for forming an interlayer insulating film and semiconductor device
06/15/2004US6750136 Contact structure production method
06/15/2004US6750135 Method for forming chip scale package
06/15/2004US6750133 Selective ball-limiting metallurgy etching processes for fabrication of electroplated tin bumps
06/15/2004US6750132 Flip chip package, circuit board thereof and packaging method thereof
06/15/2004US6750129 Process for forming fusible links
06/15/2004US6750128 Methods of polishing, interconnect-fabrication, and producing semiconductor devices
06/15/2004US6750125 Semiconductor device and method for manufacturing the same, semiconductor wafer and semiconductor device manufactured thereby
06/15/2004US6750115 Method for generating alignment marks for manufacturing MIM capacitors
06/15/2004US6750114 One-mask metal-insulator-metal capacitor and method for forming same
06/15/2004US6750113 Metal-insulator-metal capacitor in copper
06/15/2004US6750108 Method for manufacturing a semiconductor device
06/15/2004US6750084 Method of mounting a leadless package and structure therefor
06/15/2004US6750083 Method of masking microelectronic semiconductor chips with protective caps
06/15/2004US6750082 Method of assembling a package with an exposed die backside with and without a heatsink for flip-chip
06/15/2004US6750080 Semiconductor device and process for manufacturing the same
06/15/2004US6749944 Stacked film, method for the formation of stacked film, insulating film, and substrate for semiconductor
06/15/2004US6749927 Dielectric resin composition and multilayer circuit board comprising dielectric layers formed therefrom
06/15/2004US6749890 Terminal electrode forming method in chip-style electronic component and apparatus therefor
06/15/2004US6749711 Apparatus and methods for coverlay removal and adhesive application
06/15/2004US6749699 Stress resistant alloy
06/15/2004US6749439 Circuit board riser
06/15/2004US6749013 Heat sink
06/15/2004US6749012 Liquid cooling system for processors
06/15/2004US6749011 Heat sink
06/15/2004US6749010 Composite heat sink with metal base and graphite fins
06/15/2004US6749009 Folded fin on edge heat sink
06/15/2004US6748758 Cooling device, method of manufacturing the same and portable equipment
06/15/2004US6748755 Refrigeration system utilizing incomplete evaporation of refrigerant in evaporator
06/15/2004US6748746 Device and method for controlling temperature of semiconductor module
06/15/2004US6748715 Safety unit
06/15/2004US6748656 Folded-fin heatsink manufacturing method and apparatus
06/10/2004WO2004049443A2 Camouflaged circuit structure
06/10/2004WO2004049439A1 Semiconductor device
06/10/2004WO2004049438A2 Method for producing a calibration wafer
06/10/2004WO2004049437A1 Crack resistant interconnect module
06/10/2004WO2004049436A1 Semiconductor device having a bond pad and method for its fabrication
06/10/2004WO2004049435A1 Semiconductor device having clips for connecting to external elements
06/10/2004WO2004049434A2 Decreasing thermal contact resistance at a material interface
06/10/2004WO2004049433A1 Power semiconductor module
06/10/2004WO2004049432A2 Sealing porous structures
06/10/2004WO2004049426A1 Film carrier tape for mounting of electronic part
06/10/2004WO2004049425A1 Gold alloy bonding wire for semiconductor device and process for producing the same
06/10/2004WO2004049424A2 Microelectronic packaging and components
06/10/2004WO2004049407A2 Plate through mask for generating alignment marks of mim capacitors
06/10/2004WO2004049400A2 Methods for applying thermally conductive compounds utilizing piezo electric jet deposition
06/10/2004WO2004049394A2 Digital and rf system and method therefor
06/10/2004WO2004048457A1 Curable epoxy compositions, methods and articles made therefrom
06/10/2004WO2004048017A1 Copper flake powder, method for producing copper flake powder, and conductive paste using copper flake powder
06/10/2004WO2004038800A3 Multilayered integrated circuit with non functional conductive traces
06/10/2004WO2004038318A3 Vapor escape microchannel heat exchanger
06/10/2004WO2003065926A3 Wearable biomonitor with flexible thinned integrated circuit
06/10/2004US20040110394 Method and apparatus for controlling coating thickness
06/10/2004US20040110369 Methods for forming single damascene via or trench cavities and for forming dual damascene via cavities
06/10/2004US20040110367 Semiconductor device and manufacturing method thereof
06/10/2004US20040110365 Method of forming a planarized bond pad structure
06/10/2004US20040110364 Method for making UBM pads and bumps on wafer
06/10/2004US20040110355 Embedded MIM capacitor and zigzag inductor scheme
06/10/2004US20040110334 Effective Vcc TO Vss power ESD protection device
06/10/2004US20040110323 Method for producing encapsulated chips
06/10/2004US20040110319 Fabrication process of semiconductor package and semiconductor package
06/10/2004US20040110316 Semiconductor device and method of manufacturing the same
06/10/2004US20040110315 Apparatus for evaluating amount of charge, method for fabricating the same, and method for evaluating amount of charge
06/10/2004US20040110313 Integrated circuit identification
06/10/2004US20040110163 Preparing molecular conductive wire comprising nucleic acids forming a central canal composed of linearly arranged metal ions within the canal and an electron-rich external surface
06/10/2004US20040110024 a polyimide film and an electro-conductive metal film in which the metal film is attached to the polyimide film using neither heat curing adhesive nor thermoplastic adhesive; good for manufacturing a flexible printed circuit board (FPC).