Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
07/2004
07/22/2004WO2004061934A1 Selective underfill for flip chips and flip-chip assemblies
07/22/2004WO2004061931A1 Semiconductor device having multilevel wiring structure and method for fabricating the same
07/22/2004WO2004061928A1 Method and device for plasma-etching organic material film
07/22/2004WO2004061908A2 Cooling apparatus having low profile extrusion and method of manufacture therefore
07/22/2004WO2004061903A2 Method for fabrication of semiconductor device
07/22/2004WO2004061901A2 Heatsink with multiple, selectable fin densities
07/22/2004WO2004061900A2 Thermal interface material and methods for assembling and operating devices using such material
07/22/2004WO2004061859A2 Stochastic assembly of sublithographic nanoscale interfaces
07/22/2004WO2004061851A2 An improved method for making high-density nonvolatile memory
07/22/2004WO2004061726A1 Nested design approach
07/22/2004WO2004061141A1 Metal material and method for production thereof
07/22/2004WO2004061036A1 Thermally-formable and cross-linkable precursor of a thermally conductive material
07/22/2004WO2004061035A1 Flexible heat sink
07/22/2004WO2004060960A1 Composition and method to achieve reduced thermal expansion in polyarylene networks
07/22/2004WO2004060958A1 Curable resin composition and products of curing thereof
07/22/2004WO2004060957A1 Phosphorus-modified epoxy resin
07/22/2004WO2004044985A3 Folded-flex bondwire-less multichip power package
07/22/2004WO2004042297A3 Method and apparatus for efficient vertical fluid delivery for cooling a heat producing device
07/22/2004WO2004040622A3 Nickel silicide with reduced interface roughness
07/22/2004WO2004038795A3 Thermal-conductive substrate package
07/22/2004WO2004027863A3 Hybrid card
07/22/2004WO2003096419A3 Integrated strip conductor arrangement
07/22/2004WO2003067609A3 Signal wire shielding technique
07/22/2004US20040143805 Device for determining the mask version utilized for each metal layer of an integrated circuit
07/22/2004US20040143062 Thermosetting resin composition
07/22/2004US20040142583 Spring interconnect structures
07/22/2004US20040142574 Semiconductor device and method of manufacturing the same, circuit board, and electronic instrument
07/22/2004US20040142565 Single and multilevel rework
07/22/2004US20040142552 Conductive bump for semiconductor device and method for making the same
07/22/2004US20040142551 Semiconductor device and a method of manufacturing the same
07/22/2004US20040142549 Method for forming semiconductor device bonding pads
07/22/2004US20040142540 Wafer bonding for three-dimensional (3D) integration
07/22/2004US20040142526 Fuse boxes with guard rings for integrated circuits and integrated circuits including the same
07/22/2004US20040142513 Cooling of optoelectronic elements
07/22/2004US20040142512 Method of manufacturing a semiconductor device
07/22/2004US20040142511 Lead frame and production process thereof and production process of thermally conductive substrate
07/22/2004US20040142509 Semiconductor device and method of manufacturing the same, circuit board, and electronic instrument
07/22/2004US20040142508 Non-planar surface for semiconductor chips
07/22/2004US20040142507 Tape stiffener, semiconductor device component assemblies including same, and stereolithographic methods for fabricating same
07/22/2004US20040142505 Semiconductor package free of substrate and fabrication method thereof
07/22/2004US20040142499 Wafer-level testing apparatus and method
07/22/2004US20040142253 Mask set for compensating a misalignment between patterns and method of compensating a misalignment between patterns using the same
07/22/2004US20040142202 a multilayered material of solder, copper, nickel, gold, and a soluble tape
07/22/2004US20040142191 using a transparent and heat resistant polyimide film as a protection coverfilm instead of using a higher cost black polyimide film and using a black epoxy adhesive containingcarbon black powder instead of using a common epoxy adhesive.
07/22/2004US20040142180 Heat dissipating device for electronic components of electronic control devices
07/22/2004US20040141299 Burrless castellation via process and product for plastic chip carrier
07/22/2004US20040141298 Ball grid array package construction with raised solder ball pads
07/22/2004US20040141296 Stress resistant land grid array (LGA) module and method of forming the same
07/22/2004US20040141295 Circuit module for motor vehicles
07/22/2004US20040141291 High-efficiency heat sink and method for manufacturing the same
07/22/2004US20040141290 Heat sink with non-uniform fins and transverse protrusion
07/22/2004US20040141289 Apparatus and method for cooling an electronic device
07/22/2004US20040141267 Electrostatic discharge circuit and method therefor
07/22/2004US20040140877 Microconverter and laminated magnetic-core inductor
07/22/2004US20040140860 Integrated circuit interconnect system
07/22/2004US20040140826 Method for detecting the reliability of integrated semiconductor components at high temperatures
07/22/2004US20040140765 Light-emitting diode and method for its production
07/22/2004US20040140574 Method of eliminating uncontrolled voids in sheet adhesive layer
07/22/2004US20040140573 Semiconductor package and fabrication method thereof
07/22/2004US20040140571 Mounting structure of electronic device
07/22/2004US20040140569 Semiconductor memory device
07/22/2004US20040140568 Faulty electrical continuity between the wiring layer and the via section avoided by integrally forming the connecting portion with the first wiring layer and having a curved boundary between a connecting side and wiring layer surface
07/22/2004US20040140567 Semiconductor device and method of manufacture thereof
07/22/2004US20040140566 Composition for a wiring, a wiring using the composition, manufacturing method thereof, a display using the wiring and a manufacturing method thereof
07/22/2004US20040140565 Electrical connection device between two tracks of an integrated circuit
07/22/2004US20040140564 Structure of a CMOS image sensor and method for fabricating the same
07/22/2004US20040140563 Metal interconnect layer of semiconductor device and method for forming a metal interconnect layer
07/22/2004US20040140560 Method and apparatus for interconnecting a relatively fine pitch circuit layer and adjacent power plane(s) in a laminated construction
07/22/2004US20040140559 Electronic device configured as a multichip module, leadframe, panel with leadframe positions, and method for producing the electronic device
07/22/2004US20040140558 Semiconductor device and method of manufacturing same
07/22/2004US20040140556 Integrated chip package structure using silicon substrate and method of manufacturing the same
07/22/2004US20040140555 Semiconductor device
07/22/2004US20040140554 Electronic module having compliant spacer
07/22/2004US20040140553 Wiring connection structure of laminated capacitor and decoupling capacitor, and wiring board
07/22/2004US20040140552 Semiconductor device
07/22/2004US20040140551 Semiconductor device, method for manufacturing same and thin plate interconnect line member
07/22/2004US20040140550 High-frequency package
07/22/2004US20040140549 Wiring structure and its manufacturing method
07/22/2004US20040140547 Semiconductor chip and method for manufacturing the same
07/22/2004US20040140546 [stack chip package structure]
07/22/2004US20040140545 Method for fabricating semiconductor package having flex circuit, interconnects, and dense array external contacts
07/22/2004US20040140544 Semiconductor device
07/22/2004US20040140542 Prefabricated semiconductor chip carrier
07/22/2004US20040140541 Method of manufacturing a semiconductor package with elevated tub
07/22/2004US20040140539 Semiconductor device with double nickel-plated leadframe
07/22/2004US20040140538 Flex-based ic package construction employing a balanced lamination
07/22/2004US20040140536 Semiconductor substrate, method for fabricating the same, and method for fabricating semiconductor device
07/22/2004US20040140534 Semiconductor device having passivation cap and method for manufacturing the same
07/22/2004US20040140533 Providing a substrate; forming recess in surface for the receiving of integrated circuit die,depositing a dielectric layer; forming conductive pad; disposing an integrated circuit die within recess; forming an electrical interconnection
07/22/2004US20040140532 Dicing tape and die ejection method
07/22/2004US20040140528 Stacked variable inductor
07/22/2004US20040140524 Fuse structure window
07/22/2004US20040140523 Programmable resistance memory element with indirect heating
07/22/2004US20040140519 Semiconductor integrated circuit device and exposure method
07/22/2004US20040140517 LDMOS transistor with high voltage source and drain terminals hideaki tsuchiko
07/22/2004US20040140505 Electrostatic discharge device protection structure
07/22/2004US20040140502 Semiconductor integrated circuit device and a method of manufacturing the same
07/22/2004US20040140501 Integrated circuit devices having fuse structures including buffer layers and methods of fabricating the same
07/22/2004US20040140494 Contact structure
07/22/2004US20040140490 Sputtering aluminum under high pressure; reduced power source