Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
07/2004
07/28/2004CN1516277A Equipment for protecting high-frequency radio-frequency integrated circuit against electrostatic discharge injury
07/28/2004CN1516276A Seiconductor interconnection with double-cover and its mfg. method
07/28/2004CN1516274A Integrated circuit packaging body
07/28/2004CN1516273A Radiation device for electronic element
07/28/2004CN1516272A Semiconductor device, its mfg. method and thin sheet interconnecting line parts
07/28/2004CN1516253A Semiconductor device and its mfg. method
07/28/2004CN1516252A Method for mfg. semiconductor integrated circuit device
07/28/2004CN1516251A Method for mfg. semiconductor assembly and semiconductor assembly
07/28/2004CN1516250A Semiconductor device and mfg. method, circuit board and film carrier belt
07/28/2004CN1516243A Crystalline grain in metal film growth control method
07/28/2004CN1516241A Method for forming penetrating electrode and chip with penerating electrode
07/28/2004CN1516203A Constrained sintering method for asymmetrical configurational dielectric layer
07/28/2004CN1515977A Mainboard setting method for improving computer performance and its mainboard
07/28/2004CN1515623A Wavelength exchange pouring material, its application and preparation method
07/28/2004CN1159956C Terminal electrode for circuit substrate on which chip package mounted and method for manufacturing the same
07/28/2004CN1159764C N channel metal-oxide-semiconductor drive circuit and its manufacture method
07/28/2004CN1159761C Connecting material for electronic elements, and semiconductor device using same
07/28/2004CN1159756C Lead wire frame and its producing method
07/27/2004US6768964 Method and apparatus for determining dot-mark-forming position of semiconductor wafer
07/27/2004US6768660 Multi-chip memory devices and modules including independent control of memory chips
07/27/2004US6768649 Method and a circuit system for using equivalent integrated-circuit devices operating at different voltages
07/27/2004US6768646 High density internal ball grid array integrated circuit package
07/27/2004US6768641 Heat dissipation assembly
07/27/2004US6768619 Low-voltage-triggered SOI-SCR device and associated ESD protection circuit
07/27/2004US6768516 Semiconductor device constituting a CMOS camera system
07/27/2004US6768401 Wiring board with a waveguide tube and wiring board module for mounting plural wiring boards
07/27/2004US6768386 Dual clock package option
07/27/2004US6768213 Automated combi deposition apparatus and method
07/27/2004US6768212 Semiconductor packages and methods for manufacturing such semiconductor packages
07/27/2004US6768211 Five layer adhesive/insulator/metal/insulator/adhesive tape for semiconductor die packaging
07/27/2004US6768210 Bumpless wafer scale device and board assembly
07/27/2004US6768209 Underfill compounds including electrically charged filler elements, microelectronic devices having underfill compounds including electrically charged filler elements, and methods of underfilling microelectronic devices
07/27/2004US6768207 Multichip wafer-level package and method for manufacturing the same
07/27/2004US6768206 Organic substrate for flip chip bonding
07/27/2004US6768205 Thin-film circuit substrate
07/27/2004US6768204 Self-aligned conductive plugs in a semiconductor device
07/27/2004US6768202 Semiconductor device and method of manufacturing the same
07/27/2004US6768201 Interlevel insulating film covers gate electrode
07/27/2004US6768200 Ultralow dielectric constant material as an intralevel or interlevel dielectric in a semiconductor device
07/27/2004US6768199 Flip chip type semiconductor device and method of fabricating the same
07/27/2004US6768196 Packaged microchip with isolation
07/27/2004US6768195 Multi-chip semiconductor device
07/27/2004US6768193 Heat transfer structure for a semiconductor device utilizing a bismuth glass layer
07/27/2004US6768192 Pin layout of dual band receiver with two input pads/pins restricted to a single side of a four sided package
07/27/2004US6768191 Electronic component with stacked electronic elements
07/27/2004US6768190 Stack type flip-chip package
07/27/2004US6768189 High power chip scale package
07/27/2004US6768188 Semiconductor device
07/27/2004US6768187 Coupling spaced bond pads to a contact
07/27/2004US6768186 Semiconductor device and laminated leadframe package
07/27/2004US6768185 Formation of antifuse structure in a three dimensional memory
07/27/2004US6768184 Fuse structure used in an integrated circuit device
07/27/2004US6768177 Parallel plate diode
07/27/2004US6768176 Electrostatic discharge protection circuit
07/27/2004US6768163 Nonvolatile semiconductor memory device and nonvolatile semiconductor memory system
07/27/2004US6768153 Semiconductor device
07/27/2004US6768142 Circuit component placement
07/27/2004US6768063 Multilayer; capacitance coupling
07/27/2004US6768062 Connection method and connection structure of pad electrodes, and inspecting methods for connection state thereof
07/27/2004US6767820 Chip scale surface mounted device and process of manufacture
07/27/2004US6767819 Apparatus with compliant electrical terminals, and methods for forming same
07/27/2004US6767817 Asymmetric plating
07/27/2004US6767815 Stereolithographically fabricated conductive elements, semiconductor device components and assemblies including such conductive elements, and methods
07/27/2004US6767812 Method of forming CVD titanium film
07/27/2004US6767810 Method to increase substrate potential in MOS transistors used in ESD protection circuits
07/27/2004US6767800 Process for integrating alignment mark and trench device
07/27/2004US6767796 Method of manufacturing semiconductor device and the semiconductor device
07/27/2004US6767789 Method for interconnection between transfer devices and storage capacitors in memory cells and device formed thereby
07/27/2004US6767788 Semiconductor device having a metal insulator metal capacitor
07/27/2004US6767782 Suppressing electric charges generated on substrate and which flow to ground potential through substrate prevents damages to substrate due to charge-up
07/27/2004US6767769 Metal-to-metal antifuse employing carbon-containing antifuse material
07/27/2004US6767768 Method for forming antifuse via structure
07/27/2004US6767767 Method of manufacturing a semiconductor device in which a block molding package utilizes air vents in a substrate
07/27/2004US6767766 Heat dissipation structure; power control circuits
07/27/2004US6767765 Methods and apparatus for disposing a thermal interface material between a heat source and a heat dissipation device
07/27/2004US6767762 Lightweight semiconductor device and method for its manufacture
07/27/2004US6767761 Method of manufacturing a flip-chip semiconductor device with a stress-absorbing layer made of thermosetting resin
07/27/2004US6767753 Image sensor of a quad flat package
07/27/2004US6767616 Metal core substrate and process for manufacturing same
07/27/2004US6767409 Method for cleaning semiconductor wafer after chemical mechanical polishing on copper wiring
07/27/2004US6767140 Ceramic optical sub-assembly for opto-electronic module utilizing LTCC (low-temperature co-fired ceramic) technology
07/27/2004US6766998 Molds for wafer scale molding of protective caps
07/27/2004US6766852 Heatsink plate
07/27/2004US6766851 Heat sink fin assembly
07/22/2004WO2004062333A1 Thermally enhanced package for an integrated circuit
07/22/2004WO2004062094A2 Sealed and pressurized liquid cooling system for microprocessor
07/22/2004WO2004061982A1 Cooling device for electronic component using thermo-electric conversion material
07/22/2004WO2004061973A1 Group iii nitride based flip-chip integrated circuit and method for fabricating
07/22/2004WO2004061962A2 Multi-layer integrated semiconductor structure
07/22/2004WO2004061961A1 Multi-layer integrated semiconductor structure having an electrical shielding portion
07/22/2004WO2004061960A2 Semiconductor device power interconnect striping
07/22/2004WO2004061959A1 Packaged ic using insulated wire
07/22/2004WO2004061958A1 Electro-osmotic pumps and micro-channels
07/22/2004WO2004061957A1 Method and apparatus for temperature control of optoelectronic semiconductor components
07/22/2004WO2004061956A1 Heat sink of electronic component
07/22/2004WO2004061954A2 Electronic unit integrated into a flexible polymer body
07/22/2004WO2004061953A2 Method of forming a multi-layer semiconductor structure incorporating a processing handle member
07/22/2004WO2004061952A2 Method of forming a multi-layer semiconductor structure having a seamless bonding interface
07/22/2004WO2004061947A1 Semiconductor device, dram integrated circuit device, and its manufacturing method
07/22/2004WO2004061936A1 Low stress semiconductor die attach