Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
02/2014
02/04/2014US8642462 Interconnection designs and materials having improved strength and fatigue life
02/04/2014US8642408 Semiconductor device
02/04/2014US8642393 Package on package devices and methods of forming same
02/04/2014US8642388 Method for manufacturing light emitting diodes including forming circuit structures with a connecting section
02/04/2014US8642387 Method of fabricating stacked packages using laser direct structuring
02/04/2014US8642385 Wafer level package structure and the fabrication method thereof
02/04/2014US8642384 Semiconductor device and method of forming non-linear interconnect layer with extended length for joint reliability
02/04/2014US8642382 Integrated circuit packaging system with support structure and method of manufacture thereof
02/04/2014US8641619 Analyte monitoring device and methods of use
02/04/2014US8640962 Radiofrequency identification device and method for producing said device
02/04/2014US8640943 Fabrication method of semiconductor integrated circuit device
01/2014
01/30/2014WO2014018824A1 Heat exchanging apparatus and method for transferring heat
01/30/2014WO2014018538A1 Methods and arrangements relating to semiconductor packages including multi-memory dies
01/30/2014WO2014017889A1 Hardening composition
01/30/2014WO2014017888A1 Hardening composition
01/30/2014WO2014017887A1 Curable composition
01/30/2014WO2014017886A1 Hardening composition
01/30/2014WO2014017885A1 Curable composition
01/30/2014WO2014017884A1 Hardening composition
01/30/2014WO2014017883A1 Hardening composition
01/30/2014WO2014017661A1 Flow path member, and heat exchanger and semiconductor manufacturing device using same
01/30/2014WO2014017473A1 Protective film-forming layer, sheet for forming protective film, and method for manufacturing semiconductor device
01/30/2014WO2014017300A1 Method for producing metal-liquid crystal polymer complex and electronic component
01/30/2014WO2014017299A1 Metal material having surface for bonding to liquid crystal polymer, metal-liquid crystal polymer composite, method for producing same, and electronic component
01/30/2014WO2014017273A1 Package for housing semiconductor element, and semiconductor device
01/30/2014WO2014017228A1 Module
01/30/2014WO2014017160A1 Module, and device having module mounted thereon
01/30/2014WO2014017159A1 Module, and production method therefor
01/30/2014WO2014017110A1 Wiring board and package, and electronic device
01/30/2014WO2014016085A2 Cooling device and method for producing a cooling device and circuit assembly having a cooling device
01/30/2014WO2014015820A1 Method for forming mos device passivation layer and mos device
01/30/2014WO2014015636A1 Array substrate, method for manufacturing same, and display device
01/30/2014WO2014015603A1 Sensor and method for manufacturing same
01/30/2014WO2013156568A3 Circuit arrangement for thermally conductive chip assembly and production method
01/30/2014WO2013016133A3 A one-component, dual-cure adhesive for use on electronics
01/30/2014US20140031510 Curable composition
01/30/2014US20140030851 Method for Fabricating Array-Molded Package-on-Package
01/30/2014US20140030849 Pick-and-Place Tool for Packaging Process
01/30/2014US20140030848 Interlayer filler composition for three-dimensional integrated circuit, coating fluid and process for producing three-dimensional integrated circuit
01/30/2014US20140029227 Electronic circuit and semiconductor component
01/30/2014US20140029222 Chip component-embedded resin multilayer substrate and manufacturing method thereof
01/30/2014US20140029202 Motor controller
01/30/2014US20140029181 Interlayer interconnects and associated techniques and configurations
01/30/2014US20140027933 Device and method for alignment of vertically stacked wafers and die
01/30/2014US20140027932 Manufacturing an underfill in a semiconductor chip package
01/30/2014US20140027930 Semiconductor device including semiconductor package
01/30/2014US20140027929 Semiconductor Device and Method of Forming Vertical Interconnect Structure with Conductive Micro Via Array for 3-D FO-WLCSP
01/30/2014US20140027928 Semiconductor device having crack-resisting ring structure and manufacturing method thereof
01/30/2014US20140027927 Method for manufacturing a component having an electrical through-connection
01/30/2014US20140027926 Semiconductor package and method of fabricating the same
01/30/2014US20140027925 Through-holed interposer, packaging substrate, and methods of fabricating the same
01/30/2014US20140027924 Semiconductor devices including spacers on sidewalls of conductive lines and methods of manufacturing the same
01/30/2014US20140027923 Non-lithographic hole pattern formation
01/30/2014US20140027922 Via in substrate with deposited layer
01/30/2014US20140027921 Connection Carrier for Semiconductor Chips and Semiconductor Component
01/30/2014US20140027920 Semiconductor device and method for manufacturing the same
01/30/2014US20140027919 Semiconductor device and method of manufacturing the same
01/30/2014US20140027918 Cross-coupling based design using diffusion contact structures
01/30/2014US20140027917 Non-lithographic line pattern formation
01/30/2014US20140027916 Semiconductor device having vertical channel
01/30/2014US20140027915 Production of adhesion structures in dielectric layers using photoprocess technology and devices incorporating adhesion structures
01/30/2014US20140027914 Protection of under-layer conductive pathway
01/30/2014US20140027913 Semiconductor structures comprising conductive material lining openings in an insulative material
01/30/2014US20140027912 Sidewalls of electroplated copper interconnects
01/30/2014US20140027911 Sidewalls of electroplated copper interconnects
01/30/2014US20140027910 Method for reducing wettability of interconnect material at corner interface and device incorporating same
01/30/2014US20140027909 Metallization of fluorocarbon-based dielectric for interconnects
01/30/2014US20140027908 Integrated Circuit Interconnects and Methods of Making Same
01/30/2014US20140027907 Semiconductor device with embedded interconnect pad
01/30/2014US20140027906 Semiconductor device, a mobile communication device, and a method for manufacturing a semiconductor device
01/30/2014US20140027905 Semiconductor package structure and method for making the same
01/30/2014US20140027904 Semiconductor device
01/30/2014US20140027903 Semiconductor Package Including an Integrated Waveguide
01/30/2014US20140027902 Repairing anomalous stiff pillar bumps
01/30/2014US20140027901 Package-on-package structures having buffer dams and methods for forming the same
01/30/2014US20140027900 Bump Structure for Yield Improvement
01/30/2014US20140027899 Controlling thermal interface material bleed out
01/30/2014US20140027898 Multichip electronic packages and methods of manufacture
01/30/2014US20140027897 Semiconductor memory device and method of fabricating the same
01/30/2014US20140027896 Semiconductor device package with cap element
01/30/2014US20140027895 Three-dimensional mounting semiconductor device and method of manufacturing three-dimensional mounting semiconductor device
01/30/2014US20140027894 Resin molded semiconductor device and manufacturing method thereof
01/30/2014US20140027893 Circuit substrate for mounting chip, method for manufacturing same and chip package having same
01/30/2014US20140027892 Electric Device Package Comprising a Laminate and Method of Making an Electric Device Package Comprising a Laminate
01/30/2014US20140027891 Semiconductor device and method for manufacturing semiconductor device
01/30/2014US20140027890 Low Stress Package For an Integrated Circuit
01/30/2014US20140027889 Reconstituted wafer package with high voltage discrete active dice and integrated field plate for high temperature leakage current stability
01/30/2014US20140027888 System and method to manufacture an implantable electrode
01/30/2014US20140027887 Wafer backside doping for thermal neutron shielding
01/30/2014US20140027885 Three-dimensional integrated circuit laminate, and interlayer filler for three-dimensional integrated circuit laminate
01/30/2014US20140027884 System and method for gas-phase sulfur passivation of a semiconductor surface
01/30/2014US20140027867 Packages and methods for 3d integration
01/30/2014US20140027866 Noise shielding techniques for ultra low current measurements in biochemical applications
01/30/2014US20140027862 Rf cmos transistor design
01/30/2014US20140027861 Integrated circuit and display device including the same
01/30/2014US20140027836 Nonvolatile semiconductor memory device and method for manufacturing same
01/30/2014US20140027822 Copper Contact Plugs with Barrier Layers
01/30/2014US20140027771 Device identification assignment and total device number detection
01/30/2014US20140027435 Heating apparatus for heating electronic components on a printed circuit board in low temperature environment
01/30/2014US20140026961 Gas barrier film