H01L 23 - Details of semiconductor or other solid state devices

Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
12/2004
12/14/2004	US6831366 Interconnects containing first and second porous low-k dielectrics separated by a porous buried etch stop layer
12/14/2004	US6831365 Method and pattern for reducing interconnect failures
12/14/2004	US6831364 Method for forming a porous dielectric material layer in a semiconductor device and device formed
12/14/2004	US6831363 Structure and method for reducing thermo-mechanical stress in stacked vias
12/14/2004	US6831362 Diffusion barrier layer for semiconductor device and fabrication method thereof
12/14/2004	US6831361 Flip chip technique for chip assembly
12/14/2004	US6831360 Semiconductor device having an elastic resin with a low modulus of elasticity
12/14/2004	US6831359 Power semiconductor module
12/14/2004	US6831358 Heat-dissipative coating
12/14/2004	US6831357 Circuit substrate device, method for producing the same, semiconductor device and method for producing the same
12/14/2004	US6831354 Semiconductor package and method of fabricating same
12/14/2004	US6831353 Interdigitated leads-over-chip lead frame and device for supporting an integrated circuit die
12/14/2004	US6831352 Semiconductor package for high frequency performance
12/14/2004	US6831351 Semiconductor device with semiconductor chip formed by using wide gap semiconductor as base material
12/14/2004	US6831349 Method of forming a novel top-metal fuse structure
12/14/2004	US6831330 Method and apparatus for forming an integrated circuit electrode having a reduced contact area
12/14/2004	US6831317 System with meshed power and signal buses on cell array
12/14/2004	US6831307 Semiconductor mounting system
12/14/2004	US6831301 Method and system for electrically coupling a chip to chip package
12/14/2004	US6831294 Semiconductor integrated circuit device having bump electrodes for signal or power only, and testing pads that are not coupled to bump electrodes
12/14/2004	US6831234 Multilayer printed circuit board
12/14/2004	US6831233 Chip package with degassing holes
12/14/2004	US6831031 Comprises boron nitride powder as filler dispersed into silicone rubber matrix; dielectrics; semiconductors
12/14/2004	US6831008 Nickel silicide—silicon nitride adhesion through surface passivation
12/14/2004	US6831005 Electron beam process during damascene processing
12/14/2004	US6831001 Method of fabricating a stacked local interconnect structure
12/14/2004	US6831000 Semiconductor device manufacturing method
12/14/2004	US6830999 Method of fabricating flip chip semiconductor device utilizing polymer layer for reducing thermal expansion coefficient differential
12/14/2004	US6830984 Thick traces from multiple damascene layers
12/14/2004	US6830978 Semiconductor device and manufacturing method for the same
12/14/2004	US6830966 Fully silicided NMOS device for electrostatic discharge protection
12/14/2004	US6830961 Methods for leads under chip in conventional IC package
12/14/2004	US6830960 Stress-relieving heatsink structure and method of attachment to an electronic package
12/14/2004	US6830959 Semiconductor die package with semiconductor die having side electrical connection
12/14/2004	US6830958 Method of making chip scale package
12/14/2004	US6830957 Method of fabricating BGA packages
12/14/2004	US6830956 Method for packaging a low profile semiconductor device
12/14/2004	US6830955 Semiconductor package and method for manufacturing the same
12/14/2004	US6830943 Thin film CMOS calibration standard having protective cover layer
12/14/2004	US6830941 Method and apparatus for identifying individual die during failure analysis
12/14/2004	US6830823 Gold powders, methods for producing powders and devices fabricated from same
12/14/2004	US6830822 A pigment with modified properties because of the powder size being below 100 nanometers. Blue, yellow and brown pigments are illustrated. Nanoscale coated, un-coated, whisker inorganic fillers are included. Stoichiometric and
12/14/2004	US6830813 Stress-reducing structure for electronic devices
12/14/2004	US6830806 Methods of manufacture of electric circuit substrates and components having multiple electric characteristics and substrates and components so manufactured
12/14/2004	US6830780 Depositing layer of chromium onto diamond component; depositing metal selected from tungsten, molybdenum, tantalum, niobium, or their alloy with chromium; depositing layer of silver or gold or copper; heating
12/14/2004	US6830463 Ball grid array connection device
12/14/2004	US6830461 Electrical contact and electrical connection device using same
12/14/2004	US6830429 Small cooling fan
12/14/2004	US6830177 Method and apparatus to compliantly interconnect commercial-off-the-shelf chip scale packages and printed wiring boards
12/14/2004	US6830098 Heat pipe fin stack with extruded base
12/14/2004	US6830097 Combination tower and serpentine fin heat sink device
12/14/2004	US6829824 Method for producing a structural member from plates stacked on top of each other and soldered together
12/14/2004	US6829823 Forming plated through hole; surface roughness facilitates deposition of conductive metal; shrinkage inhibition
12/09/2004	WO2004107837A1 Cooling device
12/09/2004	WO2004107829A2 A novel packaging method for microstructure and semiconductor devices
12/09/2004	WO2004107572A1 Piezoelectric device
12/09/2004	WO2004107495A1 Tunable low loss transmission lines
12/09/2004	WO2004107444A1 Semiconductor device
12/09/2004	WO2004107441A1 An integrated circuit package employing a flexible substrate
12/09/2004	WO2004107440A1 Electronic parts, module, module assembling method, identification method, and environment setting method
12/09/2004	WO2004107439A1 An integrated circuit package employing a head-spreader member
12/09/2004	WO2004107438A1 Submount and semiconductor device using same
12/09/2004	WO2004107437A1 Image sensing module and method for constructing the same
12/09/2004	WO2004107436A1 Semiconductor package having filler metal of gold/silver/copper alloy
12/09/2004	WO2004107434A1 Wiring structure and method for producing same
12/09/2004	WO2004107398A2 Semiconductor device with an air gap formed using a photosensitive material
12/09/2004	WO2004107352A2 Use of voids between elements in semiconductor structures for isolation
12/09/2004	WO2004107263A1 Semiconductor device and its manufacturing method
12/09/2004	WO2004106822A1 Cooling device of thin plate type for preventing dry-out
12/09/2004	WO2004106454A2 Foamable underfill encapsulant
12/09/2004	WO2004106448A1 Method for applying adhesive to a substrate
12/09/2004	WO2004106223A1 Carbon nanotube device, process for producing the same and carbon nanotube transcriptional body
12/09/2004	WO2004106221A2 Microelectromechanical device packages with integral heaters
12/09/2004	WO2004093505A3 Emi shielding for electronic component packaging
12/09/2004	WO2004054342A3 Method, system and apparatus for cooling high power density devices
12/09/2004	WO2004036311A3 Anti-reflective compositions comprising triazine compounds
12/09/2004	US20040249598 Method to selectively identify reliability risk die based on characteristics of local regions on the wafer
12/09/2004	US20040248437 Reinforced substrates having edge-mount connectors
12/09/2004	US20040248435 Socket for semiconductor device
12/09/2004	US20040248397 Methods of forming a conductive structure in an integrated circuit device
12/09/2004	US20040248393 Method of manufacturing semiconductor device and the semiconductor device
12/09/2004	US20040248344 Microelectromechanical systems, and methods for encapsualting and fabricating same
12/09/2004	US20040248343 Method for protecting the redistribution layer on wafers/chips
12/09/2004	US20040248342 Method for packaging integrated circuit chips
12/09/2004	US20040248341 Connection between a semiconductor chip and an external conductor structure and method for producing it
12/09/2004	US20040248337 Encapsulant for opto-electronic devices and method for making it
12/09/2004	US20040248330 Semiconductor device and its manufacturing method
12/09/2004	US20040247925 Method and system for adjusting a curvature of a load plate based on a target load
12/09/2004	US20040247840 Electronic elements, method for manufacturing electronic elements, circuit substrates, method for manufacturing circuit substrates, electronic devices and method for manufacturing electronic devices
12/09/2004	US20040247797 Electroconductive film wiring on pattern area on a plate by liquid drop discharge; andsecond conductive film formed outside to be electrically separated; uniform thickness, quality
12/09/2004	US20040247782 Palladium-containing particles, method and apparatus of manufacture, palladium-containing devices made therefrom
12/09/2004	US20040246795 SOI substrate and manufacturing method thereof
12/09/2004	US20040246692 Electronic circuit component
12/09/2004	US20040246691 Dual pitch contact pad footprint for flip-chip chips and modules
12/09/2004	US20040246690 Printed circuit board, method for producing same and semiconductor device
12/09/2004	US20040246688 Technique for laminating multiple substrates
12/09/2004	US20040246684 Sheet computer, wearable computer, display device, fabrication methods, and electronic devices thereof
12/09/2004	US20040246682 Apparatus and package for high frequency usages and their manufacturing method
12/09/2004	US20040246681 Stack up assembly
12/09/2004	US20040246680 Stack up assembly

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