Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 23 - Details of semiconductor or other solid state devices
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
02/2005
02/03/2005US20050026420 Method of manufacturing a semiconductor device using a polysilicon etching mask
02/03/2005US20050026418 Method of manufacturing semiconductor device
02/03/2005US20050026417 Process for fabricating a semiconductor component and semiconductor component
02/03/2005US20050026416 Encapsulated pin structure for improved reliability of wafer
02/03/2005US20050026414 Methods for consolidating previously unconsolidated conductive material to form conductive structures or contact pads or secure conductive structures to contact pads
02/03/2005US20050026413 Method of fabricating cylindrical bonding structure
02/03/2005US20050026405 Semiconductor integrated circuit device
02/03/2005US20050026397 Crack stop for low k dielectrics
02/03/2005US20050026388 Techniques to create low K ILD for BEOL
02/03/2005US20050026386 Ultrathin leadframe BGA circuit package
02/03/2005US20050026358 Method for manufacturing semiconductor integrated circuit device
02/03/2005US20050026351 Packaging of electronic chips with air-bridge structures
02/03/2005US20050026347 Methods of forming semiconductor logic circuitry, and semiconductor logic circuit constructions
02/03/2005US20050026339 Methods of forming semiconductor circuitry, and semiconductor circuit constructions
02/03/2005US20050026336 Current limiting antifuse programming path
02/03/2005US20050026335 Method of fabricating semiconductor device and semiconductor device
02/03/2005US20050026332 Techniques for curvature control in power transistor devices
02/03/2005US20050026331 Composite lid for land grid array (lga) flip-chip package assembly
02/03/2005US20050026330 Conductive block mounting process for electrical connection
02/03/2005US20050026329 Semiconductor device for applying well bias and method of fabricating the same
02/03/2005US20050026328 Process for manufacturing semiconductor device
02/03/2005US20050026327 Semiconductor integrated circuit package having electrically disconnected solder balls for mounting
02/03/2005US20050026325 Packaged microelectronic components
02/03/2005US20050026323 Method of manufacturing a semiconductor device
02/03/2005US20050026314 Method of manufacturing semiconductor device
02/03/2005US20050026312 Method for producing and testing a corrosion-resistant channel in a silicon device
02/03/2005US20050026310 Method for in-line monitoring of via/contact holes etch process based on test structures in semiconductor wafer manufacturing
02/03/2005US20050025944 Heat resistance; low temperature fusion; forming apertures in dielectric substrate
02/03/2005US20050025927 Packaged component and manufacturing process thereof
02/03/2005US20050025654 Substrate material for mounting a semiconductor device, substrate for mounting a semiconductor device, semiconductor device, and method of producing the same
02/03/2005US20050024973 Current limiting antifuse programming path
02/03/2005US20050024958 Power supply device
02/03/2005US20050024925 Configuration for generating a voltage sense signal in a power semiconductor component
02/03/2005US20050024839 Ball grid array package
02/03/2005US20050024838 Power supply packaging system
02/03/2005US20050024832 Heat sink clip with pressing post
02/03/2005US20050024830 Liquid-cooled heat sink assembly
02/03/2005US20050024823 Computer
02/03/2005US20050024805 Low-inductance circuit arrangement for power semiconductor modules
02/03/2005US20050024801 Monolithic integratable circuit arrangement for protection against a transient voltage
02/03/2005US20050024800 Voltage protection device
02/03/2005US20050024799 Electronic component protected against elelctrostatic discharges
02/03/2005US20050024519 Solid-state imaging device and method for manufacturing the same
02/03/2005US20050024178 Switchable inductance
02/03/2005US20050024176 Inductor device having improved quality factor
02/03/2005US20050024166 Millimeter wave (MMW) radio frequency transceiver module and method of forming same
02/03/2005US20050023931 Support and decoupling structure for an acoustic resonator, acoustic resonator and corresponding integrated circuit
02/03/2005US20050023715 Method for producing a semiconductor-molding tablet, a semiconductor-molding tablet obtained thereby and a semiconductor device using the same
02/03/2005US20050023709 Alignment mark and alignment method using the same for photolithography to eliminating process bias error
02/03/2005US20050023708 Conductive isolation frames for active microelectronic devices, and methods of making such conductive isolation frames
02/03/2005US20050023706 Semiconductor device and semiconductor device manufacturing method
02/03/2005US20050023705 Power grid layout techniques on integrated circuits
02/03/2005US20050023704 Ground pad structure for preventing solder extrusion and semiconductor package having the ground pad structure
02/03/2005US20050023703 Variable thickness pads on a substrate surface
02/03/2005US20050023702 Semiconductor device and method for fabricating the same
02/03/2005US20050023701 Semiconductor device and method of manufacturing the same
02/03/2005US20050023700 Pad over active circuit system and method with meshed support structure
02/03/2005US20050023699 Selective electroless-plated copper metallization
02/03/2005US20050023698 Alternating aluminum and copper layers with aluminum top layer; reduced resistivity and resistance capacitance delay
02/03/2005US20050023696 Semiconductor device having a wiring layer of damascene structure and method for manufacturing the same
02/03/2005US20050023694 Integrated low k dielectrics and etch stops
02/03/2005US20050023693 Reliable low-k interconnect structure with hybrid dielectric
02/03/2005US20050023692 Semiconductor apparatus including a radiator for diffusing the heat generated therein
02/03/2005US20050023691 Semiconductor device and manufacturing method thereof
02/03/2005US20050023690 Insulating tube, semiconductor device employing the tube, and method of manufacturing the same
02/03/2005US20050023689 Chemical planarization performance for copper/low-k interconnect structures
02/03/2005US20050023688 Two step semiconductor manufacturing process for copper interconnects
02/03/2005US20050023685 Nickel bonding cap over copper metalized bondpads
02/03/2005US20050023683 Semiconductor package with improved ball land structure
02/03/2005US20050023682 Avoiding solder separation induced by surface tension; plastic encapsulation of integrated circuit chip and removal of carrier tape
02/03/2005US20050023680 Semiconductor device with strain relieving bump design
02/03/2005US20050023679 Substrate with reinforced contact pad structure
02/03/2005US20050023678 Chip structure with bumps and a process for fabricating the same
02/03/2005US20050023677 Method for assembling a ball grid array package with multiple interposers
02/03/2005US20050023676 Solder pads and method of making a solder pad
02/03/2005US20050023675 Semiconductor device and manufacturing method of the same
02/03/2005US20050023671 Semiconductor device and a method of manufacturing the same
02/03/2005US20050023670 Semiconductor device and a method of manufacturing the same
02/03/2005US20050023669 Semiconductor wafer, semiconductor device, method for manufacturing the semiconductor device, circuit board, and electronic apparatus
02/03/2005US20050023667 Multi-chips module package and manufacturing method thereof
02/03/2005US20050023666 Semiconductor device and method of fabricating the same, circuit board, and electronic instrument
02/03/2005US20050023665 Curable encapsulant compositions
02/03/2005US20050023664 High density chip carrier with integrated passive devices
02/03/2005US20050023663 Method of forming a package
02/03/2005US20050023662 Techniques for packaging a multiple device component
02/03/2005US20050023661 Hermetic sealing cap and method of manufacturing the same
02/03/2005US20050023660 Semiconductor device and its manufacturing method
02/03/2005US20050023659 Semiconductor chip package and stacked module having a functional part and packaging part arranged on a common plane
02/03/2005US20050023658 Leadless type semiconductor package, and production process for manufacturing such leadless type semiconductor package
02/03/2005US20050023657 Stacked chip-packaging structure
02/03/2005US20050023656 Vertical system integration
02/03/2005US20050023655 Packaged microelectronic devices and methods of forming same
02/03/2005US20050023654 Method for fabricating semiconductor component with chip on board leadframe
02/03/2005US20050023653 Integrated circuit device having reduced bow and method for making same
02/03/2005US20050023652 Electronic component and semiconductor device, method of fabricating the same, circuit board mounted with the same, and electronic appliance comprising the circuit board
02/03/2005US20050023651 Semiconductor component having chip on board leadframe and method of fabrication
02/03/2005US20050023650 Capacitive techniques to reduce noise in high speed interconnections
02/03/2005US20050023649 Semiconductor chip with FIB protection
02/03/2005US20050023648 Semiconductor device and method of locating a predetermined point on the semiconductor device
02/03/2005US20050023647 Semiconductor wafer and method of manufacturing semiconductor device
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