Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
02/2005
02/22/2005US6858910 A plastic land-grid array package, a ball-grid array package, and a plastic leaded package or micromechanical components are fabricated
02/22/2005US6858902 Efficient ESD protection with application for low capacitance I/O pads
02/22/2005US6858901 ESD protection circuit with high substrate-triggering efficiency
02/22/2005US6858900 ESD protection devices and methods to reduce trigger voltage
02/22/2005US6858892 Semiconductor device
02/22/2005US6858885 Semiconductor apparatus and protection circuit
02/22/2005US6858875 Light-emitting-element array
02/22/2005US6858872 Optical interconnection integrated circuit, method of manufacturing optical interconnection integrated circuit, electro-optical apparatus, and electronic apparatus
02/22/2005US6858807 Substrate for receiving a circuit configuration and method for producing the substrate
02/22/2005US6858800 Electronic part with a lead frame
02/22/2005US6858799 Electronic component with a semiconductor chip and method of producing the electronic component
02/22/2005US6858795 Radiation shielding of three dimensional multi-chip modules
02/22/2005US6858792 Tool-less coupling assembly
02/22/2005US6858530 Method for electrically characterizing charge sensitive semiconductor devices
02/22/2005US6858529 Methods of forming contact plugs including polysilicon doped with an impurity having a lesser diffusion coefficient than phosphorus
02/22/2005US6858528 Composite sacrificial material
02/22/2005US6858527 Method to increase electromigration resistance of copper using self-assembled organic thiolate monolayers
02/22/2005US6858526 Methods of forming materials between conductive electrical components, and insulating materials
02/22/2005US6858525 Stacked local interconnect structure and method of fabricating same
02/22/2005US6858484 Method of fabricating semiconductor integrated circuit device
02/22/2005US6858474 Wire bond package and packaging method
02/22/2005US6858473 Method for manufacturing semiconductor device, adhesive sheet for use therein and semiconductor device
02/22/2005US6858472 Method for implementing selected functionality on an integrated circuit device
02/22/2005US6858469 Method and apparatus for epoxy loc die attachment
02/22/2005US6858468 Techniques for joining an opto-electronic module to a semiconductor package
02/22/2005US6858467 Method for fabricating semiconductor packages with stacked dice and leadframes
02/22/2005US6858466 System and a method for fluid filling wafer level packages
02/22/2005US6858453 Integrated circuit package alignment feature
02/22/2005US6858441 MRAM MTJ stack to conductive line alignment method
02/22/2005US6858300 Red phosphorus-base flame retardant for epoxy resins, red phosphorus-base flame retardant compositions therefor, processes for the production of both, epoxy resin compositions for sealing for semiconductor devices, sealants and semiconductor devices
02/22/2005US6858153 Integrated low K dielectrics and etch stops
02/22/2005US6858151 Bonding copper/nickel alloy plate to ceramic substrate, applying photoresist, etching, then removing photoresist; reduces displacement failure during mounting of semiconductors
02/22/2005US6858121 Method and apparatus for filling low aspect ratio cavities with conductive material at high rate
02/22/2005US6857915 Wire bonding surface for connecting an electrical energy storage device to an implantable medical device
02/22/2005US6857470 Stacked chip package with heat transfer wires
02/22/2005US6857459 Wirefilm bonding for electronic component interconnection
02/22/2005US6857173 Apparatus for and method of manufacturing a semiconductor die carrier
02/17/2005WO2005015971A1 Radiating structure of electronic equipment
02/17/2005WO2005015970A2 Cooling device for an electronic component, especially for a microprocessor
02/17/2005WO2005015636A1 Semiconductor device
02/17/2005WO2005015634A1 Method for placing wires on a panel with compensation of positional errors of semiconductor chips in panel component positions
02/17/2005WO2005015633A2 Cooling device for dissipating thermal losses from an electric or electronic component or a sub-assembly and cooler
02/17/2005WO2005015632A1 Multichip circuit module and method for the production thereof
02/17/2005WO2005015488A1 Chip card, chip card module and method for the production of a chip card module
02/17/2005WO2005015106A1 Finned heat exchanger
02/17/2005WO2005015104A2 Tower heat sink with sintered grooved wick
02/17/2005WO2004109774A3 Selective reference plane bridge(s) on folded package
02/17/2005WO2004100263A3 Packaging of an integrated circuit with internal impedance matching
02/17/2005WO2004093164A3 Layered microelectronic contact and method for fabricating same
02/17/2005WO2004084317A3 An optical sub-assembly for a transceiver
02/17/2005WO2004068545A3 Method and apparatus for the use of self-assembled nanowires for the removal of heat from integrated circuits
02/17/2005WO2004051806B1 Flip-chip device having conductive connectors
02/17/2005WO2004044960A3 Thermal interface composite structure and method of making same
02/17/2005US20050038618 Substrate inspecting device, coating/developing device and substrate inspecting method
02/17/2005US20050038188 Silicones having improved chemical resistance and curable silicone compositions having improved migration resistance
02/17/2005US20050037618 Singulation method used in leadless packaging process
02/17/2005US20050037613 Diffusion barrier for copper lines in integrated circuits
02/17/2005US20050037612 Superconductor device and method of manufacturing the same
02/17/2005US20050037611 EMI and noise shielding for multi-metal layer high frequency integrated circuit processes
02/17/2005US20050037609 Semiconductor device and production method therefor
02/17/2005US20050037606 Insulative materials including voids and precursors thereof
02/17/2005US20050037604 Multilayer interconnect structure containing air gaps and method for making
02/17/2005US20050037602 Semiconductor device using bumps, method for fabricating same, and method for forming bumps
02/17/2005US20050037601 Semiconductor package substrate having contact pad protective layer formed thereon and method for fabricating the same
02/17/2005US20050037590 Semiconductor device and method for manufacturing same
02/17/2005US20050037580 Manufacturing method for semiconductor device
02/17/2005US20050037568 Metal-insulator-metal capacitor
02/17/2005US20050037545 Flip chip on lead frame
02/17/2005US20050037544 Method of forming a leadframe for a semiconductor package
02/17/2005US20050037543 Method of manufacturing heat conductive substrate
02/17/2005US20050037542 Process for producing a semiconductor device
02/17/2005US20050037540 Three-dimensional module comprised of layers containing IC chips with overlying interconnect layers and a method of making the same
02/17/2005US20050037539 Semiconductor package, semiconductor device, electronic device, and method for producing semiconductor package
02/17/2005US20050037538 Method for manufacturing solid-state imaging devices
02/17/2005US20050037536 Semiconductor packaging structure and method for forming the same
02/17/2005US20050037535 Method for fabricating high frequency module
02/17/2005US20050037523 Optimized monitor method for a metal patterning process
02/17/2005US20050037522 Dummy fill for integrated circuits
02/17/2005US20050037258 Electrochemical cell and fabrication method of the same
02/17/2005US20050037204 Aligned perpendicular to substrate; chemical vapor deposition; heavy pressure pretreatment improves thermoconductivity; Langmuir-Blodgett process
02/17/2005US20050036292 Thermally enhanced electronic module with self-aligning heat sink
02/17/2005US20050036291 Semiconductor package with heat dissipating structure
02/17/2005US20050036289 Heat dissipation device
02/17/2005US20050036278 Electronic component and method for manufacturing the same
02/17/2005US20050036265 Magnetically coupled device and electronic equipment employing same
02/17/2005US20050036081 Semiconductor device, liquid crystal display device and method of manufacturing the semiconductor device
02/17/2005US20050035469 CSP semiconductor device having signal and radiation bump groups
02/17/2005US20050035468 Semiconductor electronic device and method of manufacturing thereof
02/17/2005US20050035467 Semiconductor package using flexible film and method of manufacturing the same
02/17/2005US20050035466 Wire bonding method for copper interconnects in semiconductor devices
02/17/2005US20050035464 [electrical package and manufacturing method thereof]
02/17/2005US20050035461 Multiple stacked-chip packaging structure
02/17/2005US20050035460 Damascene structure and process at semiconductor substrate level
02/17/2005US20050035459 Semiconductor device having a multiple thickness interconnect
02/17/2005US20050035458 Metal film semiconductor device and a method for forming the same
02/17/2005US20050035457 Interconnecting structure with dummy vias
02/17/2005US20050035456 Integrated circuitry and a semiconductor processing method of forming a series of conductive lines
02/17/2005US20050035454 Semiconductor device including a layer having a beta-crystal structure
02/17/2005US20050035453 Bump transfer fixture
02/17/2005US20050035452 Die-up ball grid array package including a substrate having an opening and method for making the same