Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 23 - Details of semiconductor or other solid state devices
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
03/2005
03/15/2005US6867972 Power component assembly for mechatronic integration of power components
03/15/2005US6867971 Heat dissipation apparatus
03/15/2005US6867677 On-chip inductive structure
03/15/2005US6867669 Apparatus and method to form ground connections
03/15/2005US6867668 High frequency signal transmission from the surface of a circuit substrate to a flexible interconnect cable
03/15/2005US6867610 Test structure for determining the stability of electronic devices comprising connected substrates
03/15/2005US6867606 Multiple directional scans of test structures on semiconductor integrated circuits
03/15/2005US6867507 Lead frame
03/15/2005US6867506 Plastic ball grid array assembly
03/15/2005US6867505 Semiconductor device, a method for making the same, and an LCD monitor comprising the same
03/15/2005US6867503 Formation of voids in the interface layer is diminished semiconductors
03/15/2005US6867502 Semiconductor device
03/15/2005US6867501 Semiconductor device and method for manufacturing same
03/15/2005US6867499 Semiconductor packaging
03/15/2005US6867498 Metal line layout of an integrated circuit
03/15/2005US6867497 Integrated circuitry
03/15/2005US6867496 Interconnect substrate enabling easy positioning, a semiconductor device, methods of fabricating, inspecting, and mounting the semiconductor device, a circuit board, and an electronic instrument.
03/15/2005US6867494 Semiconductor module
03/15/2005US6867493 Structure and method for fabrication of a leadless multi-die carrier
03/15/2005US6867492 Radio-frequency power component, radio-frequency power module, method for producing a radio-frequency power component, and method for producing a radio-frequency power module
03/15/2005US6867491 Metal core integrated circuit package with electrically isolated regions and associated methods
03/15/2005US6867490 Semiconductor device
03/15/2005US6867489 Semiconductor die package processable at the wafer level
03/15/2005US6867488 Thick metal top layer
03/15/2005US6867486 Stack chip module with electrical connection and adhesion of chips through a bump for improved heat release capacity
03/15/2005US6867485 Semiconductor package using terminals formed on a conductive layer of a circuit board
03/15/2005US6867483 Stress-free lead frame
03/15/2005US6867482 Tape carrier type semiconductor device, method for manufacturing the same, and flexible substrate
03/15/2005US6867481 Lead frame structure with aperture or groove for flip chip in a leaded molded package
03/15/2005US6867480 Integrated circuit partially encapsulated within an electromagnetic interference resistant molding compound, and then the integrated circuit is completely encapsulated within a second molding compound,
03/15/2005US6867479 Method for rewiring pads in a wafer-level package
03/15/2005US6867478 Semiconductor device having improved alignment of an electrode terminal on a semiconductor chip and a conductor coupled to the electrode terminal
03/15/2005US6867471 Universal package for an electronic component with a semiconductor chip and method for producing the universal package
03/15/2005US6867466 Memory device and method for forming a passivation layer thereon
03/15/2005US6867461 ESD protection circuit
03/15/2005US6867446 Semiconductor memory device
03/15/2005US6867441 Metal fuse structure for saving layout area
03/15/2005US6867430 Substrate identification circuit and semiconductor device
03/15/2005US6867368 Multi-layer ceramic feedthrough structure in a transmitter optical subassembly
03/15/2005US6867367 Package for integrated circuit die
03/15/2005US6867366 Semiconductor integrated apparatus
03/15/2005US6867141 Method for fabricating semiconductor device and forming interlayer dielectric film using high-density plasma
03/15/2005US6867132 Large line conductive pads for interconnection of stackable circuitry
03/15/2005US6867127 Diamond metal-filled patterns achieving low parasitic coupling capacitance
03/15/2005US6867125 Creating air gap in multi-level metal interconnects using electron beam to remove sacrificial material
03/15/2005US6867124 Integrated circuit packaging design and method
03/15/2005US6867123 Semiconductor integrated circuit device and its manufacturing method
03/15/2005US6867121 Method of apparatus for interconnecting a relatively fine pitch circuit layer and adjacent power plane(s) in a laminated construction
03/15/2005US6867120 Method of fabricating a semiconductor device with a gold conductive layer and organic insulating layer
03/15/2005US6867109 Mask set for compensating a misalignment between patterns and method of compensating a misalignment between patterns using the same
03/15/2005US6867108 Wiring line assembly and method for manufacturing the same, and thin film transistor array substrate having the wiring line assembly and method for manufacturing the same
03/15/2005US6867106 Semiconductor device and method for fabricating the same
03/15/2005US6867079 Method for manufacturing semiconductor device
03/15/2005US6867073 Single mask via method and device
03/15/2005US6867072 Flipchip QFN package and method therefor
03/15/2005US6867071 Leadframe including corner leads and semiconductor package using same
03/15/2005US6867070 Bonding pad structure of a semiconductor device and method for manufacturing the same
03/15/2005US6867069 Semiconductor package with a chip connected to a wiring substrate using bump electrodes and underfilled with sealing resin
03/15/2005US6867068 Semiconductor device, method of making the same, circuit board, and film carrier tape
03/15/2005US6867066 Method for production of a semiconductor device with package that includes an insulator frame on a metal member
03/15/2005US6867059 A-C:H ISFET device manufacturing method, and testing methods and apparatus thereof
03/15/2005US6867056 System and method for current-enhanced stress-migration testing of interconnect
03/15/2005US6866943 Bond pad structure comprising tungsten or tungsten compound layer on top of metallization level
03/15/2005US6866908 Electromagnetic radiation shield; heat dissipation; mixture of thermoplastic resin and conductivity particles
03/15/2005US6866901 Method for edge sealing barrier films
03/15/2005US6866893 Pressing open end against resin transferring layer of material; drying
03/15/2005US6866540 Indicia-equipped actuator assembly
03/15/2005US6866182 Apparatus and method to prevent oxidation of electronic devices
03/15/2005US6865804 Method for integrated EMI shielding
03/15/2005CA2843395A1 Device package and methods for the fabrication and testing thereof
03/15/2005CA2793031A1 Device package and methods for the fabrication and testing thereof
03/15/2005CA2481637A1 Device package and methods for the fabrication and testing thereof
03/15/2005CA2481616A1 Device package and methods for the fabrication and testing thereof
03/10/2005WO2005022966A2 A method for pattern metalization of substrates
03/10/2005WO2005022965A2 Expansion constrained die stack
03/10/2005WO2005022643A1 Thermal stability for silver metallization
03/10/2005WO2005022635A1 Semiconductor device protection circuit and semiconductor device having the same
03/10/2005WO2005022633A1 Chip support of a lead frame for an integrated circuit package
03/10/2005WO2005022632A1 Surface-mounted device with leads
03/10/2005WO2005022631A1 Semiconductor package and manufacturing method thereof
03/10/2005WO2005022630A1 Lid and method of employing a lid in an integrated circuit
03/10/2005WO2005022625A1 Basic cell, end section cell, wiring shape, wiring method, shield wiring structure
03/10/2005WO2005022599A2 Integrated circuit package having inductance loop formed from same-pin-to-same-bonding-pad structure
03/10/2005WO2005022598A2 Integrated circuit package having inductance loop formed from same-pin-to-same-bonding-pad structure
03/10/2005WO2005022597A2 Integrated circuit package having an inductance loop formed from a multi-loop configuration
03/10/2005WO2005022591A2 Reversible leadless package and methods of making and using same
03/10/2005WO2005022588A2 Semiconductor component comprising a rewiring layer, and method for the production thereof
03/10/2005WO2005022557A1 On-vehicle electromagnetic circuit conduction transmission body and connection structure body and assembly, and production methods therefor
03/10/2005WO2005022542A1 Method and arrangement for the production of a memory chip having different data bit widths
03/10/2005WO2005022176A2 Temperature control system which sprays liquid coolant droplets against an ic-module at a sub-atmospheric pressure
03/10/2005WO2005022135A1 In situ determination of resistivity, mobility and dopant concentration profiles
03/10/2005WO2005022052A1 Two-phase cooling apparatus and method for automatic test equipment
03/10/2005WO2005021828A2 Copper-containing pvd targets and methods for their manufacture
03/10/2005WO2005021647A1 No-flow underfill material having low coefficient of thermal expansion and good solder ball fluxing performance
03/10/2005WO2005021428A1 Boron nitride agglomerated powder
03/10/2005WO2005021258A1 Surface protection film and method for producing same
03/10/2005WO2005021257A1 Thin bond-line silicone adhesive
03/10/2005WO2005011350A3 Cooling method and apparatus
03/10/2005WO2004088727B1 Multi-chip ball grid array package and method of manufacture
03/10/2005WO2003098709A8 Semiconductor device using semiconductor chip
1 ... 1396 1397 1398 1399 1400 1401 1402 1403 1404 1405 1406 1407 1408 1409 1410 1411 1412 1413 1414 1415 1416 ... 2262