Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 23 - Details of semiconductor or other solid state devices
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
06/2005
06/16/2005US20050130407 Dual damascene process for forming a multi-layer low-k dielectric interconnect
06/16/2005US20050130406 Method of manufacturing an electronic device
06/16/2005US20050130405 Method of making a semiconductor device having a low k dielectric
06/16/2005US20050130403 Stacked local interconnect structure and method of fabricating same
06/16/2005US20050130380 Semiconductor device structures including metal silicide interconnects and dielectric layers at substantially the same fabrication level
06/16/2005US20050130369 Semiconductor device having metal-insulator-metal capacitor and method for fabricating the same
06/16/2005US20050130368 Capacitor and manufacturing method thereof, semiconductor device and substrate for a semiconductor device
06/16/2005US20050130363 Method and an apparatus for a hard-coded bit value changeable in any layer of metal
06/16/2005US20050130362 Electronic assembly including a die having an integrated circuit and a layer of diamond to transfer heat
06/16/2005US20050130351 Methods for maskless lithography
06/16/2005US20050130350 Flip clip attach and copper clip attach on MOSFET device
06/16/2005US20050130348 Semiconductor package assembly and method for electrically isolating modules
06/16/2005US20050130347 Semiconductor package assembly and method for electrically isolating modules
06/16/2005US20050130346 Semiconductor package assembly and method for electrically isolating modules
06/16/2005US20050130345 Castellation wafer level packaging of integrated circuit chips
06/16/2005US20050130344 Method of manufacturing thin film element, thin film transistor circuit substrate, active matrix display device, electro-optical device, and electronic apparatus
06/16/2005US20050130343 Method of making a microelectronic assembly
06/16/2005US20050130331 Dual function array feature for cmp process control and inspection
06/16/2005US20050130327 Shielding arrangement to protect a circuit from stray magnetic fields
06/16/2005US20050129989 Integrated battery pack with lead frame connection
06/16/2005US20050129957 Encapsulating light emitting semiconductor
06/16/2005US20050129843 Substrate overcoated with metal particles in liquid and stabilizers
06/16/2005US20050128843 Nonvolatile semiconductor memory
06/16/2005US20050128832 Method of determining localized electron tunneling in a capacitive structure
06/16/2005US20050128715 Integrated-circuit cooling system
06/16/2005US20050128714 Fastener for mounting heat-radiator to electronic device
06/16/2005US20050128713 Apparatus for cooling semiconductor devices attached to a printed circuit board
06/16/2005US20050128709 Heat-radiating structure of electronic apparatus
06/16/2005US20050128708 Levers for support of heatsink component
06/16/2005US20050128706 Power module with heat exchange
06/16/2005US20050128705 Composite cold plate assembly
06/16/2005US20050128702 Heat exchanger with cooling channels having varying geometry
06/16/2005US20050128664 Circuits and methods that attenuate coupled noise
06/16/2005US20050128337 Cerdip type of solid-state image sensing device, structure and method for gripping cerdip type of solid-state image sensing device
06/16/2005US20050128041 Multilayer inductor with shielding plane
06/16/2005US20050128038 Electrically decoupled integrated transformer having at least one grounded electric shield
06/16/2005US20050127536 Conductor composition, a mounting substrate and a mounting structure utilizing the composition
06/16/2005US20050127535 Method of manufacturing a semiconductor device and a semiconductor device
06/16/2005US20050127534 Semiconductor component and method for fabricating
06/16/2005US20050127533 Patterned plasma treatment to improve distribution of underfill material
06/16/2005US20050127532 Inverted J-lead package for power devices
06/16/2005US20050127531 Method for ball grid array chip packages having improved testing and stacking characteristics
06/16/2005US20050127530 Structure and method for fabricating a bond pad structure
06/16/2005US20050127529 Structure and method for reinforcing a bond pad on a chip
06/16/2005US20050127527 Electronic component with flexible contacting pads and method for producing the electronic component
06/16/2005US20050127526 Semi conductor device
06/16/2005US20050127523 Semiconductor device, method of manufacturing semiconductor device, semiconductor chip, electronic module and electronic equipment
06/16/2005US20050127522 Semiconductor device and electronic device, as well as method for manufacturing the same
06/16/2005US20050127521 Electronic component with compliant elevations having electrical contact areas and method for producing it
06/16/2005US20050127520 Device package, a printed wiring board, and an electronic apparatus
06/16/2005US20050127519 High density contact to relaxed geometry layers
06/16/2005US20050127518 Copper tungsten phosphide formed by electrodeposition of layers
06/16/2005US20050127517 Semiconductor device
06/16/2005US20050127515 Sidewall sealing of porous dielectric materials
06/16/2005US20050127514 Line level air gaps
06/16/2005US20050127513 Semiconductor device
06/16/2005US20050127512 Semiconductor device and the method of producing the same
06/16/2005US20050127511 Interconnect structures and methods of making thereof
06/16/2005US20050127510 Metal interconnection lines of semiconductor devices and methods of forming the same
06/16/2005US20050127509 Semiconductor device and method for fabricating the same
06/16/2005US20050127508 Solder bump structure for flip chip package and method for manufacturing the same
06/16/2005US20050127507 Method of making semiconductor device
06/16/2005US20050127506 Method and an apparatus for a hard-coded bit value changeable in any layer of metal
06/16/2005US20050127505 Semiconductor devices integrated with wafer-level packaging
06/16/2005US20050127504 Semiconductor device, semiconductor chip, method for manufacturing semiconductor device, and electronic apparatus
06/16/2005US20050127503 Power semiconductor module and method for producing it
06/16/2005US20050127502 Thermal dispensing enhancement for high performance flip chip BGA (HPFCBGA)
06/16/2005US20050127501 Ball grid array package substrates with a modified central opening and method for making the same
06/16/2005US20050127500 Local reduction of compliant thermally conductive material layer thickness on chips
06/16/2005US20050127498 Copper-based chip attach for chip-scale semiconductor packages
06/16/2005US20050127497 Arrangement with a semiconductor chip and support therefore and method for a bonded wire connection
06/16/2005US20050127496 Bonding pads with dummy patterns in semiconductor devices and methods of forming the same
06/16/2005US20050127495 Method of fabrication of a die oxide ring
06/16/2005US20050127494 Semiconductor package
06/16/2005US20050127493 Semiconductor device and electronic device, and methods for manufacturing thereof
06/16/2005US20050127492 Semiconductor packages for enhanced number of terminals, speed and power performance
06/16/2005US20050127489 Microelectronic device signal transmission by way of a lid
06/16/2005US20050127488 Hydrogen diffusion hybrid port and method of forming
06/16/2005US20050127487 Semiconductor package with improved solder joint reliability
06/16/2005US20050127486 Chip-scale package and carrier for use therewith
06/16/2005US20050127485 Light-emitting diode package structure
06/16/2005US20050127484 Die extender for protecting an integrated circuit die on a flip chip package
06/16/2005US20050127483 Thin, thermally enhanced flip chip in a leaded molded package
06/16/2005US20050127482 Method of forming a semiconductor package and leadframe therefor
06/16/2005US20050127480 Gallium arsenide (GaAs) semiconductor substrates compatible with soft-solder technologies, used in plastic packages
06/16/2005US20050127478 Microelectronic devices and methods for filling vias in microelectronic devices
06/16/2005US20050127475 Apparatus and method for electronic fuse with improved esd tolerance
06/16/2005US20050127467 Semiconductor device and method of fabrication thereof, electronic module, and electronic instrument
06/16/2005US20050127460 Semiconductor device and method of manufacturing the same
06/16/2005US20050127453 Method of forming self-aligned contact structure with locally etched gate conductive layer
06/16/2005US20050127445 Electrostatic discharge protection device and method of manufacturing the same
06/16/2005US20050127444 Semiconductor integrated circuit
06/16/2005US20050127432 Semiconductor device having substantially planar contacts and body
06/16/2005US20050127423 Wafer acceptance testing method and structure of a test key used in the method
06/16/2005US20050127419 Semiconductor integrated circuit device
06/16/2005US20050127405 I/O circuit placement method and semiconductor device
06/16/2005US20050127397 Gallium nitride materials including thermally conductive regions
06/16/2005US20050127395 Semiconductor device and fabrication method thereof
06/16/2005US20050127384 Semiconductor optical devices and optical modules
06/16/2005US20050127382 Carrier layer for a semiconductor layer sequence and method for producing semiconductor chips
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