Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
06/2005
06/23/2005US20050135061 Heat sink, assembly, and method of making
06/23/2005US20050135048 Cooling module of computer system and related apparatus with air wall for preventing recycling of heated air
06/23/2005US20050135043 Integrated circuit package substrate having a thin film capacitor structure
06/23/2005US20050135041 Integrating passive components on spacer in stacked dies
06/23/2005US20050135033 Semiconductor integrated circuit apparatus
06/23/2005US20050134507 Ceramic embedded wireless antenna
06/23/2005US20050134420 Microconverter and laminated magnetic-core inductor
06/23/2005US20050134419 Semiconductor integrated circuit and fabrication method thereof
06/23/2005US20050134408 Circuit device and printed circuit board
06/23/2005US20050133940 Method and structure for protecting an alignment mark
06/23/2005US20050133938 Chip packaging compositions, packages and systems made therewith, and methods of making same
06/23/2005US20050133937 Semiconductor device, method of manufacturing thereof, circuit board and electronic apparatus
06/23/2005US20050133936 Adhesive film for manufacturing semiconductor device
06/23/2005US20050133935 Embedded redistribution interposer for footprint compatible chip package conversion
06/23/2005US20050133934 Thermal interface material bonding
06/23/2005US20050133933 Various structure/height bumps for wafer level-chip scale package
06/23/2005US20050133932 Semiconductor module with a semiconductor stack, and methods for its production
06/23/2005US20050133930 Packaging substrates for integrated circuits and soldering methods
06/23/2005US20050133929 Flexible package with rigid substrate segments for high density integrated circuit systems
06/23/2005US20050133928 Wire loop grid array package
06/23/2005US20050133926 capable of intensifying light at certain wavelengths; includes metallic surrounding forming a resonance chamber and insulator layer disposed in resonance chamber, having a predetermined dimension defining a cut-off wavelength
06/23/2005US20050133925 Forming a first conductive layer embedded in a groove formed in a dielectric film; and forming a pillar connecting an upper conductive layer to the lower and is to be self-aligned with respect to said first conductive layer without any usage of a growth guide crystallographically aligned with each other
06/23/2005US20050133924 Magnetic layer processing
06/23/2005US20050133923 Semiconductor device and method for manufacturing the same
06/23/2005US20050133922 Tapered dielectric and conductor structures and applications thereof
06/23/2005US20050133921 Semiconductor device
06/23/2005US20050133920 Method and materials for self-aligned dual damascene interconnect structure
06/23/2005US20050133919 Semiconductor structure with metal migration semiconductor barrier layers and method of forming the same
06/23/2005US20050133918 Via including multiple electrical paths
06/23/2005US20050133915 System and method for increasing the number of IO-s on a ball grid pattern
06/23/2005US20050133914 Semiconductor device, method of manufacturing thereof, circuit board and electronic apparatus
06/23/2005US20050133913 Stress distribution package
06/23/2005US20050133912 Electrical connection structure
06/23/2005US20050133911 Wire bonding package
06/23/2005US20050133910 Metal article intended for at least partially coating with a substance and a method for producing the same
06/23/2005US20050133909 Component packaging apparatus, systems, and methods
06/23/2005US20050133908 Chip assembly with glue-strengthening holes
06/23/2005US20050133907 Mechanism for maintaining consistent thermal interface layer in an integrated circuit assembly
06/23/2005US20050133906 Thermally enhanced semiconductor package
06/23/2005US20050133905 Method of assembling a ball grid array package with patterned stiffener layer
06/23/2005US20050133904 Method of forming metal pattern for hermetic sealing of package
06/23/2005US20050133903 Integrated circuit package substrate having a thin film capacitor structure
06/23/2005US20050133902 Dual semiconductor die package with reverse lead form
06/23/2005US20050133901 System and method for delivering power to a semiconductor device
06/23/2005US20050133900 Microelectronic assemblies with composite conductive elements
06/23/2005US20050133899 System and method for increasing the number of IO-s on a ball grid package by wire bond stacking of same size packages through apertures
06/23/2005US20050133898 Printed circuit board and inkjet head
06/23/2005US20050133897 A chip is embedded in the first package body so the back surface is exposed through the bottom surface of the first package body with outer leads extending; flexible connection substrate is interposed between the first package and the second package and the leads electrically connected; efficiency
06/23/2005US20050133896 Semiconductor package with a flip chip on a solder-resist leadframe
06/23/2005US20050133895 Flip-chip mounting of a semiconductor chip on a substrate for sealing by a resin for injection molding; reducing the internal pressure of the die cavity; changing the substrate clamping pressure is changed from a low pressure to a high pressure to fill the gap between chip and substrate; efficiency
06/23/2005US20050133894 Method and apparatus for improved power routing
06/23/2005US20050133893 Lead frame structure with aperture or groove for flip chip in a leaded molded package
06/23/2005US20050133892 Semiconductor device and method for the fabrication thereof
06/23/2005US20050133891 System and method for increasing the ball pitch of an electronic circuit package
06/23/2005US20050133890 Substrate structure capable of reducing package singular stress
06/23/2005US20050133889 Semiconductor device and method of manufacting the same, electronic module, and electronic instrument
06/23/2005US20050133888 Semiconductor packaging substrate
06/23/2005US20050133884 Electronically programmable antifuse and circuits made therewith
06/23/2005US20050133883 Three-dimensional memory structure and manufacturing method thereof
06/23/2005US20050133882 Integrated circuit fuse and method of fabrication
06/23/2005US20050133872 Two-layer patterned resistor
06/23/2005US20050133871 Electrostatic discharge protection device
06/23/2005US20050133870 Triggererd back-to-back diodes for ESD protection in triple-well CMOS process
06/23/2005US20050133868 [electro-static discharge protection circuit for dual-polarity input/output pad]
06/23/2005US20050133863 Semiconductor component arrangement with an insulating layer having nanoparticles
06/23/2005US20050133855 Semiconductor component arrangement with a defect identification circuit
06/23/2005US20050133854 Semiconductor device having pad structure for preventing and buffering stress of silicon nitride film
06/23/2005US20050133848 Method for fabricating a lateral metal-insulator-metal capacitor and a capacitor fabricated according to the method
06/23/2005US20050133829 High-frequency semiconductor device
06/23/2005US20050133826 Semiconductor antenna proximity lines
06/23/2005US20050133824 Method for manufacturing Semiconductor device, adhesive sheet for use therein and semiconductor device
06/23/2005US20050133810 Opto-electronic assembly having an encapsulant with at least two different functional zones
06/23/2005US20050133793 Flat panel display device and method of fabricating the same
06/23/2005US20050133792 Pixel structure and fabricating method thereof
06/23/2005US20050133786 Semiconductor testing device and semiconductor testing method
06/23/2005US20050133494 Carbon wire heating object sealing heater and fluid heating apparatus using the same heater
06/23/2005US20050133491 Heat generator
06/23/2005US20050133476 Methods of bridging lateral nanowires and device using same
06/23/2005US20050133256 Method for manufacturing a printed circuit board that mounts an integrated circuit device thereon and the printed circuit board
06/23/2005US20050133255 Method and apparatus for trace shielding and routing on a substrate
06/23/2005US20050133241 Chip orientation and attachment method
06/23/2005US20050133240 Electronic component
06/23/2005US20050133212 Forced fluid heat sink
06/23/2005US20050133203 Minimal fluid forced convective heat sink for high power computers
06/23/2005US20050133201 Radiation fin structure
06/23/2005US20050133200 One or more heat exchanger components in major part operably locatable outside computer chassis
06/23/2005US20050133199 Heat sink with heat pipes
06/23/2005US20050133197 Heat dissipating device
06/23/2005US20050133152 Photocurable adhesive compositions, reaction products of which have low halide ion content
06/23/2005US20050132747 Package for mounting an optical element and a method of manufacturing the same
06/23/2005US20050132571 Mechanical highly compliant thermal interface pad
06/23/2005US20050132568 subjecting substrates comprising dielectric thermosetting or thermoplastic resins, to reactive ion etching, to form passageways for conductor wires, used for mounting electronics such as semiconductors and printed circuits, which is free of short circuiting
06/23/2005DE20320926U1 Printed circuit board (PCB) with space saving cooling element for mounted electric component, containing tubular element forming duct for cooling air draught, with heat convection part for tubular element
06/23/2005DE202005003991U1 Spring mounted, fanless cooling system with heat convection tube for electric and electronic components, mainly of computer processors and electronic modules, with finned or lamellar cooler(s) and adaptor system receiving heat
06/23/2005DE202005003986U1 Fanless cooling system with sprung heat convection tube, spring mounted at both sides for electric and electronic components, e.g. computer processors or power electronic modules, with finned cooler(s) and adaptor system, with finned cooler
06/23/2005DE19756529B4 Halbleitereinrichtung, die fähig ist, eine Eingangs-/Ausgangsanschlußstiftzuordnung von außen gesehen spiegelsymmetrisch zu invertieren A semiconductor device that is capable, as seen from the outside to invert an input / output pin assignment mirror-symmetrically
06/23/2005DE10354443A1 Semiconductor component arrangement for e.g. adjusting motor vehicle seat, has defect identification circuit with Schmitt trigger to control supply of voltage to semiconductor logic unit, when unit`s temperature exceeds preset temperature
06/23/2005DE10353849A1 Kühlvorrichtung für ein elektrisches Bauteil Cooling device for an electrical part
06/23/2005DE10353530A1 Processing, especially thinning, wafers with components on one side involves applying coating system to wafer front with separating coating so coating system supports or carries wafer during thinning
06/23/2005DE10352705A1 Circuit arrangement, especially for use in space, has element, especially vacuum-tight housing on base element and at least one heat-generating component connected to housing to dissipate heat losses