Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
06/2005
06/21/2005US6909192 Hardening of copper to improve copper CMP performance
06/21/2005US6909191 Copper film used as wiring on a substrate with a tantalum nitride film over it followed by a tantalum film, and a aluminum film is used as a pad; conductive connection member connected to the aluminum
06/21/2005US6909189 Semiconductor device with dummy structure
06/21/2005US6909188 Insulation film on a first insulation film and wire, a second wire exposed from an upper surface of the second insulation film of a pad of the first wire, and a contact plug
06/21/2005US6909187 Conductive wiring layer structure
06/21/2005US6909185 20-80% cuprous oxide with a hardness of 210-230 hv and copper has a hardness of 75-80 hv; sintered; low thermal expansion, high thermal conductivity, and good plastic workability; semiconductors
06/21/2005US6909184 TAB type semiconductor device
06/21/2005US6909183 Substrate for an electric component and method for the production thereof
06/21/2005US6909182 Spherical semiconductor device and method for fabricating the same
06/21/2005US6909181 Light signal processing system
06/21/2005US6909180 Semiconductor device, mounting circuit board, method of producing the same, and method of producing mounting structure using the same
06/21/2005US6909179 Lead frame and semiconductor device using the lead frame and method of manufacturing the same
06/21/2005US6909178 Semiconductor device and method of manufacturing the same
06/21/2005US6909176 Structure and material for assembling a low-K Si die to achieve a low warpage and industrial grade reliability flip chip package with organic substrate
06/21/2005US6909174 Reference plane of integrated circuit packages
06/21/2005US6909173 Flexible substrate, semiconductor device, imaging device, radiation imaging device and radiation imaging system
06/21/2005US6909172 Semiconductor device with conduction test terminals
06/21/2005US6909171 Microelectronic device package filled with liquid or pressurized gas and associated method of manufacture
06/21/2005US6909170 Semiconductor assembly with package using cup-shaped lead-frame
06/21/2005US6909169 Grounded embedded flip chip RF integrated circuit
06/21/2005US6909168 Die pad for mounting semiconductor element is exposed from encapsulation resin; thin and reliable resin encapsulation semiconductor in which semiconductor element with large package area ratio can be packaged; high packaging density
06/21/2005US6909167 Coupling spaced bond pads to a contact
06/21/2005US6909166 Quad Flat No Lead type package of a semiconductor device; active surface has plurality of connection points with plurality of leads arranged around perimeter of chip and first and second surface orthogonal to first surface
06/21/2005US6909165 Obverse/reverse discriminative rectangular nitride semiconductor wafer
06/21/2005US6909153 Semiconductor structure having buried track conductors, and method for generating an electrical contact with buried track conductors
06/21/2005US6909132 Semiconductor device and its manufacturing method
06/21/2005US6909131 Word line strap layout structure
06/21/2005US6909128 Capacitance reduction by tunnel formation for use with a semiconductor device
06/21/2005US6909127 Low loss interconnect structure for use in microelectronic circuits
06/21/2005US6909093 Infrared detecting element, method of manufacturing the same and temperature measuring device
06/21/2005US6909055 Electrical device allowing for increased device densities
06/21/2005US6909054 Multilayer printed wiring board and method for producing multilayer printed wiring board
06/21/2005US6908977 Siloxane-based resin and method of forming an insulating film between interconnect layers of a semiconductor device using the same
06/21/2005US6908969 Unsaturated compounds containing silane, electron donor and electron acceptor functionality
06/21/2005US6908868 Gas passivation on nitride encapsulated devices
06/21/2005US6908857 Method of manufacturing semiconductor device
06/21/2005US6908856 Method for producing electrical through hole interconnects and devices made thereof
06/21/2005US6908855 Plating tail design for IC packages
06/21/2005US6908852 Method of forming an arc layer for a semiconductor device
06/21/2005US6908847 Method of manufacturing a semiconductor device having an interconnect embedded in an insulating film
06/21/2005US6908845 Integrated circuit die and an electronic assembly having a three-dimensional interconnection scheme
06/21/2005US6908844 Metallization arrangement for semiconductor structure and corresponding fabrication method
06/21/2005US6908842 Bumping process
06/21/2005US6908841 Support structures for wirebond regions of contact pads over low modulus materials
06/21/2005US6908829 Method of forming an air gap intermetal layer dielectric (ILD) by utilizing a dielectric material to bridge underlying metal lines
06/21/2005US6908821 Apparatus for adjusting input capacitance of semiconductor device and fabricating method
06/21/2005US6908815 Dual work function semiconductor structure with borderless contact and method of fabricating the same
06/21/2005US6908809 Embedded capacitors using conductor filled vias
06/21/2005US6908795 Method of fabricating an encapsulant lock feature in integrated circuit packaging
06/21/2005US6908794 Method of making a semiconductor package device that includes a conductive trace with recessed and non-recessed portions
06/21/2005US6908792 Chip stack with differing chip package types
06/21/2005US6908790 Chip carrier film, method of manufacturing the chip carrier film and liquid crystal display using the chip carrier film
06/21/2005US6908789 Method of making a microelectronic assembly
06/21/2005US6908788 Method of connecting a conductive trace to a semiconductor chip using a metal base
06/21/2005US6908787 System and method for increasing the strength of a bond made by a small diameter wire in ball bonding
06/21/2005US6908785 Multi-chip package (MCP) with a conductive bar and method for manufacturing the same
06/21/2005US6908784 Method for fabricating encapsulated semiconductor components
06/21/2005US6908781 Method and apparatus for protecting wiring and integrated circuit device
06/21/2005US6908777 Compound semiconductor device and method for controlling characteristics of the same
06/21/2005US6908776 Semiconductor device and method of manufacturing the same, apparatus for manufacturing semiconductor device, circuit boa and electronic instrument
06/21/2005US6908669 Gel material comprising at least one thermally conductive filler, at least one rubber compound crosslinked to at least one amine resin; electronic components
06/21/2005US6908569 Ruthenium silicide wet etch
06/21/2005US6908561 Applying adhesion promoter to aluminum or to etched and cleaned copper and/or titanium portions of substrate, curing, applying and curing silicone polyimide epoxy varnish and layer of adhesion promoter, laminating polyimide dielectric
06/21/2005US6908514 Wafer alignment marks protected by photoresist
06/21/2005US6908327 Electrical connector with safety load lever
06/21/2005US6908314 Tailored interconnect module
06/21/2005US6908311 Connection terminal and a semiconductor device including at least one connection terminal
06/21/2005US6907917 Graphite-based heat sinks and method and apparatus for the manufacture thereof
06/21/2005US6907659 Method for manufacturing and packaging integrated circuit
06/21/2005US6907658 Manufacturing methods for an electronic assembly with vertically connected capacitors
06/16/2005WO2005055689A1 Cooler for electronic apparatus
06/16/2005WO2005055321A2 Electronical circuit package with cavity resonance cut off member
06/16/2005WO2005055320A1 Integrated circuit package and leadframe
06/16/2005WO2005055319A2 A cooling system with a bubble pump
06/16/2005WO2005055318A1 Heat sink assembly
06/16/2005WO2005055317A1 Packaged electronic element and method of producing electronic element package
06/16/2005WO2005055316A2 Packaged microelectronic imagers and methods of packaging microelectronic imagers
06/16/2005WO2005055311A2 Device having a compliant electrical interconnects and compliant sealing element
06/16/2005WO2005055310A2 Process for packaging components, and packaged components
06/16/2005WO2005055306A1 Ultra-low dielectrics for copper inter connect
06/16/2005WO2005055293A1 Bonding method, device formed by such method, surface activating unit and bonding apparatus comprising such unit
06/16/2005WO2005055292A1 Mim capacitor structure and method of fabrication
06/16/2005WO2005055288A2 Method and device for the alternating contacting of two wafers
06/16/2005WO2005055278A2 Customized microelectronic device and method for making customized electrical interconnections
06/16/2005WO2005054878A1 A ground-signal-ground (gsg) test structure
06/16/2005WO2005053847A1 Hybrid microfluidic chip and method for manufacturing same
06/16/2005WO2005041295A3 Semiconductor module provided with contacts extending through the housing
06/16/2005WO2005029498A3 Nanoscale wire coding for stochastic assembly
06/16/2005WO2004102660A3 Thermal management materials
06/16/2005WO2004093100A3 Method for producing soldering globules on an electrical component
06/16/2005US20050132317 Method and system for automatically extracting data from a textual bump map
06/16/2005US20050132312 Method of analyzing electronic components, device for analyzing electronic components and electronic components using these
06/16/2005US20050131584 Methods and apparatus for replacing cooling systems in operating computers
06/16/2005US20050131195 Process for producing high-purity epoxy resin and epoxy resin composition
06/16/2005US20050131106 Combinations of resin compositions and methods of use thereof
06/16/2005US20050130497 Stress dispersing lead and stress dispersing method of lead
06/16/2005US20050130495 EMI shield for transceiver
06/16/2005US20050130431 Method for making a package substrate without etching metal layer on side walls of die-cavity
06/16/2005US20050130423 Method for forming inductor in semiconductor device
06/16/2005US20050130413 Interconnecting substrate for carrying semiconductor device, method of producing thereof and package of semiconductor device