| Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155) |
|---|
| 07/27/2005 | CN1212354C fire-retardant resin, composition, preliminary-dip piece, laminated board, metal cladded laminated board, printed circuit-board and multi-layer printed circuit board |
| 07/26/2005 | US6922820 Circuit for generating silicon ID for PLDS |
| 07/26/2005 | US6922341 Semiconductor package assembly and method for electrically isolating modules |
| 07/26/2005 | US6922340 Stack up assembly |
| 07/26/2005 | US6922339 Heat dissipating structure of printed circuit board and fabricating method thereof |
| 07/26/2005 | US6922127 Raised on-chip inductor and method of manufacturing same |
| 07/26/2005 | US6922070 Evaluating pattern for measuring an erosion of a semiconductor wafer polished by a chemical mechanical polishing |
| 07/26/2005 | US6922048 Integrated circuit leadframes patterned for measuring the accurate amplitude of changing currents |
| 07/26/2005 | US6921981 Ball grid array package |
| 07/26/2005 | US6921980 Integrated semiconductor circuit including electronic component connected between different component connection portions |
| 07/26/2005 | US6921979 Semiconductor device having a bond pad and method therefor |
| 07/26/2005 | US6921978 Method to generate porous organic dielectric |
| 07/26/2005 | US6921977 Semiconductor package, method of production of same, and semiconductor device |
| 07/26/2005 | US6921976 Semiconductor device including an island-like dielectric member embedded in a conductive pattern |
| 07/26/2005 | US6921975 Circuit device with at least partial packaging, exposed active surface and a voltage reference plane |
| 07/26/2005 | US6921974 Packaged device with thermal enhancement and method of packaging |
| 07/26/2005 | US6921973 Electronic module having compliant spacer |
| 07/26/2005 | US6921972 Leadless chip carrier design and structure |
| 07/26/2005 | US6921971 Frame like matrix of tungsten or molybdenum and copper, a through metal of copper and copper layers joined to surfaces as coverings |
| 07/26/2005 | US6921970 Brazing material is press- and diffusion-bonded to an intermediate metal layer |
| 07/26/2005 | US6921969 Semiconductor module and method of producing a semiconductor module |
| 07/26/2005 | US6921968 Stacked flip chip package |
| 07/26/2005 | US6921967 Leadframe with support feet sized and configured to provide structural support to a die pad |
| 07/26/2005 | US6921966 Tape under frame for lead frame IC package assembly |
| 07/26/2005 | US6921965 Die surface magnetic field shield |
| 07/26/2005 | US6921962 Integrated circuit having a thin film resistor located within a multilevel dielectric between an upper and lower metal interconnect layer |
| 07/26/2005 | US6921961 Semiconductor device having electrical contact from opposite sides including a via with an end formed at a bottom surface of the diffusion region |
| 07/26/2005 | US6921959 Semiconductor device |
| 07/26/2005 | US6921950 Semiconductor device |
| 07/26/2005 | US6921946 Test structure for electrical well-to-well overlay |
| 07/26/2005 | US6921927 System and method for enhanced LED thermal conductivity |
| 07/26/2005 | US6921919 Semiconductor device and method of forming the same |
| 07/26/2005 | US6921860 Packages for electrical and electronic apparatus such as flip chips comprising a layout of spaced dams associated with and enclosing terminals, and dielectric coverings; miniaturization |
| 07/26/2005 | US6921718 Semiconductor device and method of manufacturing the same |
| 07/26/2005 | US6921716 Wafer bumping process |
| 07/26/2005 | US6921715 Semiconductor package and method of fabricating same |
| 07/26/2005 | US6921714 Method for manufacturing a semiconductor device |
| 07/26/2005 | US6921713 Semiconductor chip package with interconnect structure |
| 07/26/2005 | US6921708 Integrated circuits having low resistivity contacts and the formation thereof using an in situ plasma doping and clean |
| 07/26/2005 | US6921706 Electronic assembly including a die having an integrated circuit and a layer of diamond to transfer heat |
| 07/26/2005 | US6921689 Method of manufacturing a capacitor with copper electrodes and diffusion barriers |
| 07/26/2005 | US6921683 Semiconductor device and manufacturing method for the same, circuit board, and electronic device |
| 07/26/2005 | US6921682 Method for manufacturing encapsulated electronic components, particularly integrated circuits |
| 07/26/2005 | US6921672 Test structures and methods for inspection of semiconductor integrated circuits |
| 07/26/2005 | US6921573 High-frequency current suppression body using magnetic loss material exhibiting outstanding complex permeability characteristics |
| 07/26/2005 | US6921551 Electrodeposition of electroconductive metals on wafers, panels, magnetic heads or substrates having cavities, by applying power and electrolyte solutions to the surfaces; integrated circuits |
| 07/26/2005 | US6921277 Processor and heat sink actuation system |
| 07/26/2005 | US6921183 Concave cup printed circuit board for light emitting diode and method for producing the same |
| 07/26/2005 | US6921018 Multi-chip stack and method of fabrication utilizing self-aligning electrical contact array |
| 07/26/2005 | US6921016 Semiconductor device and method of manufacturing the same, circuit board, and electronic equipment |
| 07/26/2005 | US6920688 Method for a semiconductor assembly having a semiconductor die with dual heat spreaders |
| 07/21/2005 | WO2005067359A1 Ceramic multilayer substrate |
| 07/21/2005 | WO2005067050A1 Plastically-deformable irreversible storage medium and method of producing one such medium |
| 07/21/2005 | WO2005067045A1 Array capacitors with voids to enable a full-grid socket |
| 07/21/2005 | WO2005067044A1 A method for connecting a die assembly to a substrate in an integrated circuit and a semiconductor device comprising a die assembly |
| 07/21/2005 | WO2005067042A1 Method for electrically connecting an electrical conductor to an electronic component, and device |
| 07/21/2005 | WO2005067041A1 Wire-bonded integrated circuit package and manufacturing method thereof |
| 07/21/2005 | WO2005067040A1 Electrical component with bond wire |
| 07/21/2005 | WO2005067039A1 Cooling apparatus of electric device |
| 07/21/2005 | WO2005067038A1 Folded fin microchannel heat exchanger |
| 07/21/2005 | WO2005067037A1 Backside cooling apparatus for modular platforms |
| 07/21/2005 | WO2005067036A1 Heat sink |
| 07/21/2005 | WO2005067029A1 Method for packaging integrated circuit dies |
| 07/21/2005 | WO2005067005A1 Small volume process chamber with hot inner surfaces |
| 07/21/2005 | WO2005066557A1 Method and apparatus for two-phase start-up operation |
| 07/21/2005 | WO2005066252A2 Inorganic powder, resin composition filled with the powder and use thereof |
| 07/21/2005 | WO2005065424A2 Micro pin grid array with wiping action |
| 07/21/2005 | WO2005065336A2 High-frequency chip packages |
| 07/21/2005 | WO2005065281A2 Articles comprising high-electrical-conductivity nanocomposite material and method for fabricating same |
| 07/21/2005 | WO2005065273A2 System and method for self-leveling heat sink for multiple height devices |
| 07/21/2005 | WO2005065255A2 Semiconductor chip package |
| 07/21/2005 | WO2005065238A2 Micro pin grid array with pin motion isolation |
| 07/21/2005 | WO2005065064A2 Power potential-free module having a high insulation voltage |
| 07/21/2005 | WO2005043623A3 Method for forming a dielectric on a metallic layer and capacitor assembly |
| 07/21/2005 | WO2005041272A3 Production method and device for improving the bonding between plastic and metal |
| 07/21/2005 | WO2005041271A3 Method and device for fixing a chip in a housing |
| 07/21/2005 | WO2005038986A3 Electrical circuit apparatus and methods for assembling same |
| 07/21/2005 | WO2005020279A3 Semiconductor device having electrical contact from opposite sides and method therefor |
| 07/21/2005 | WO2005013358A3 Arrangement of an electrical component placed on a substrate, and method for producing the same |
| 07/21/2005 | WO2005011341A3 Electronic module with dual connectvity |
| 07/21/2005 | WO2005006403A3 Thermal paste for improving thermal contacts |
| 07/21/2005 | WO2004093252B1 Electrical connector and method for making |
| 07/21/2005 | WO2004070838A3 Device and method for encapsulating with encapsulating material and electronic component fixed on a carrier |
| 07/21/2005 | WO2004064110A3 Space-efficient package for laterally conducting device |
| 07/21/2005 | WO2004042307A3 Methods and apparatuses for electronics cooling |
| 07/21/2005 | WO2003073357A8 Methods and apparatus for fabricating chip-on-board modules |
| 07/21/2005 | US20050160391 Semiconductor integrated circuit having multi-level interconnection, CAD method and CAD tool for designing the semiconductor integrated circuit |
| 07/21/2005 | US20050160389 Method of protecting a semiconductor integrated circuit from plasma damage |
| 07/21/2005 | US20050159015 Method for forming interlayer insulation film |
| 07/21/2005 | US20050159012 Semiconductor interconnect structure |
| 07/21/2005 | US20050158994 PCMO spin-coat deposition |
| 07/21/2005 | US20050158989 Method of forming wiring and method of manufacturing image display system by using the same |
| 07/21/2005 | US20050158985 Copper recess process with application to selective capping and electroless plating |
| 07/21/2005 | US20050158984 Method for manufacturing semiconductor device |
| 07/21/2005 | US20050158980 Method of forming segmented ball limiting metallurgy |
| 07/21/2005 | US20050158979 Method of manufacturing semiconductor device |
| 07/21/2005 | US20050158978 Hermetic passivation structure with low capacitance |
| 07/21/2005 | US20050158966 Method to avoid a laser marked area step height |
| 07/21/2005 | US20050158953 Method for fabricating an NROM memory cell arrangement |
| 07/21/2005 | US20050158948 Semiconductor device having self-aligned contact plug and method for fabricating the same |