Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 23 - Details of semiconductor or other solid state devices
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
10/2005
10/25/2005US6959353 Signal bus arrangement
10/25/2005US6959258 Methods and structure for IC temperature self-monitoring
10/25/2005US6959255 monitoring equipment in wafer form; system-level/real-time feed back;
10/25/2005US6958969 Optical semiconductor component package and optical pickup device
10/25/2005US6958915 Heat dissipating device for electronic component
10/25/2005US6958914 Interlocking heat sink
10/25/2005US6958913 Heatsink mounting unit
10/25/2005US6958912 Enhanced heat exchanger
10/25/2005US6958907 Optical data link
10/25/2005US6958802 Display device having island-shaped conductor for repairing line disconnection
10/25/2005US6958669 Hermetic high frequency module and method for producing the same
10/25/2005US6958548 Semiconductor device with magnetically permeable heat sink
10/25/2005US6958547 Interconnect structures containing conductive electrolessly deposited etch stop layers, liner layers, and via plugs
10/25/2005US6958546 Method for dual-layer polyimide processing on bumping technology
10/25/2005US6958545 Method for reducing wiring congestion in a VLSI chip design
10/25/2005US6958544 Semiconductor device and method of manufacturing the same
10/25/2005US6958543 Semiconductor equipment with lateral and vertical MOS regions
10/25/2005US6958542 Semiconductor device
10/25/2005US6958541 Low gate resistance layout procedure for RF transistor devices
10/25/2005US6958539 Metal bump with an insulating sidewall and method of fabricating thereof
10/25/2005US6958538 Computer system architecture using a proximity I/O switch
10/25/2005US6958537 Multiple chip semiconductor package
10/25/2005US6958536 Microelectronic packages having rail along portion of lid periphery
10/25/2005US6958535 Thermal conductive substrate and semiconductor module using the same
10/25/2005US6958534 Power semiconductor module
10/25/2005US6958533 High density 3-D integrated circuit package
10/25/2005US6958532 Semiconductor storage device
10/25/2005US6958530 Rectification chip terminal structure
10/25/2005US6958528 Leads under chip IC package
10/25/2005US6958527 Wiring board having interconnect pattern with land, and semiconductor device, circuit board, and electronic equipment incorporating the same
10/25/2005US6958525 siloxane resin and polycarbosilane dissolved in solvent. By using this solution, a low dielectric film is formed which contains siloxane resin and polycarbosilane bonded to the siloxane resin. Material of a low dielectric film is provided
10/25/2005US6958523 On chip heating for electrical trimming of polysilicon and polysilicon-silicon-germanium resistors and electrically programmable fuses for integrated circuits
10/25/2005US6958505 Integrated circuit including active components and at least one passive component associated fabrication method
10/25/2005US6958491 Bipolar transistor test structure with lateral test probe pads
10/25/2005US6958490 Light-emitting apparatus
10/25/2005US6958290 Method and apparatus for improving adhesion between layers in integrated devices
10/25/2005US6958289 Method of forming metal line in semiconductor device
10/25/2005US6958288 Semiconductor device and manufacturing method thereof
10/25/2005US6958287 Micro C-4 semiconductor die
10/25/2005US6958285 Methods of manufacturing devices having substrates with opening passing through the substrates and conductors in the openings
10/25/2005US6958281 Method for forming alignment pattern of semiconductor device
10/25/2005US6958280 Method for manufacturing alignment mark of semiconductor device using STI process
10/25/2005US6958262 Mounting structure of semiconductor device and mounting method thereof
10/25/2005US6958260 Hydrogen gettering system
10/25/2005US6958259 Method of stacking semiconductor element in a semiconductor device
10/25/2005US6958249 Method to monitor process charging effect
10/25/2005US6958106 Material separation to form segmented product
10/25/2005US6957963 Compliant interconnect assembly
10/25/2005US6957692 Heat-dissipating device
10/20/2005WO2005099331A1 Module component and manufacturing method thereof
10/20/2005WO2005099327A1 A method of creating solder bar connections on electronic packages
10/20/2005WO2005099280A2 Embedded toroidal transformers in ceramic substrates
10/20/2005WO2005099028A2 Embedded capacitors using conductor filled vias
10/20/2005WO2005098951A1 Semiconductor component comprising a counter signal circuit for preventing crosstalk between electronic subassemblies
10/20/2005WO2005098950A1 Tamper respondent covering
10/20/2005WO2005098949A2 Spacer die structure and method for attaching
10/20/2005WO2005098948A1 Semiconductor package with a three-dimensional identification coding using thermochromatic inks
10/20/2005WO2005098947A1 Microelectronic packages including nanocomposite dielectric build-up materials and nanocomposite solder resist
10/20/2005WO2005098946A2 Lead frame having a tilt flap for locking molding compound and semiconductor device having the same
10/20/2005WO2005098945A2 Top finger having a groove and semiconductor device having the same
10/20/2005WO2005098944A1 Electronic package having a sealing structure on predetermined area, and the method thereof
10/20/2005WO2005098943A1 Semiconductor element mounting substrate, semiconductor module, and electric vehicle
10/20/2005WO2005098942A1 Al/AlN JOINT MATERIAL, BASE PLATE FOR POWER MODULE, POWER MODULE AND PROCESS FOR PRODUCING Al/AlN JOINT MATERIAL
10/20/2005WO2005098941A2 Integrated circuit stacking system and method
10/20/2005WO2005098940A2 Cooling an integrated circuit die with coolant flow in a microchannel and a thin film thermoelectric cooling device in the microchannel
10/20/2005WO2005098939A2 Combination insulator and organic semiconductor formed from self-assembling block co-polymers
10/20/2005WO2005098933A1 Under bump metallization layer to enable use of high tin content solder bumps
10/20/2005WO2005098931A1 Submount and manufacturing method thereof
10/20/2005WO2005098402A2 High throughput measurement of via defects in interconnects
10/20/2005WO2005098359A1 Angular speed measuring equipment
10/20/2005WO2005098338A1 Thermal transfer devices with fluid-porous thermally conductive core
10/20/2005WO2005098335A2 Low-profile thermosyphon cooling system for computers
10/20/2005WO2005098085A2 Multi-stage curing of low k nano-porous films
10/20/2005WO2005097892A1 Epoxy resin composition for the encapsulation of semiconductors and semiconductor devices
10/20/2005WO2005096731A2 Heat spreader constructions, integrated circuitry, methods of forming heat speader contruictions, and methods of forming integrated circuitry
10/20/2005WO2005041268A3 Aluminum heat sink for a solid state relay having ultrasonically welded copper foil
10/20/2005WO2005038916A3 Inductor coil for an ic chip
10/20/2005WO2005038861A3 High density integrated circuit package architecture
10/20/2005WO2005022591A3 Reversible leadless package and methods of making and using same
10/20/2005WO2005010927A3 Anisotropic electroconductive film and method for the production thereof
10/20/2005US20050235242 Semiconductor integraged circuit device and method of routing interconnections for semiconductor IC device
10/20/2005US20050235233 Voltage reference signal circuit layout inside multi-layered substrate
10/20/2005US20050233626 IC socket
10/20/2005US20050233609 Compliant interconnect assembly
10/20/2005US20050233584 Semiconductor device having a contact window including a lower with a wider to provide a lower contact resistance
10/20/2005US20050233583 Method of manufacturing semiconductor device
10/20/2005US20050233581 Method for manufacturing semiconductor device
10/20/2005US20050233580 Alignment pattern for a semiconductor device manufacturing process
10/20/2005US20050233576 Method of depositing dielectric materials in damascene applications
10/20/2005US20050233574 Capacitance reduction by tunnel formation for use with a semiconductor device
10/20/2005US20050233573 Method for fabricating semiconductor device
10/20/2005US20050233572 Dual damascene structure formed of low-k dielectric materials
10/20/2005US20050233571 Flip chip package, semiconductor package with bumps and method for manufacturing semiconductor package with bumps
10/20/2005US20050233570 Method and apparatus for improved power routing
10/20/2005US20050233569 Bump structure for a semiconductor device and method of manufacture
10/20/2005US20050233568 Method for manufacturing semiconductor device having solder layer
10/20/2005US20050233567 Method of manufacturing multi-stack package
10/20/2005US20050233566 Lead frame and method of manufacturing the same
10/20/2005US20050233564 Semiconductor device and method for fabricating the same
10/20/2005US20050233562 Method for forming a gate electrode having a metal
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